ISP1181BBSUM STEricsson, ISP1181BBSUM Datasheet - Page 11

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ISP1181BBSUM

Manufacturer Part Number
ISP1181BBSUM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1181BBSUM

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Compliant
8. Modes of operation
Table 3.
9. Endpoint descriptions
CD00222684
Product data sheet
Mode
0
1
2
3
Bus configuration modes
BUS_CONF[1:0]
0
0
1
1
9.1 Endpoint access
The ISP1181B has four bus configuration modes, selected via pins BUS_CONF1 and
BUS_CONF0:
Mode 0
Mode 1
Mode 2
Mode 3
The bus configurations for each of these modes are given in
circuits for each mode are given in
Each USB peripheral is logically composed of several independent endpoints. An
endpoint acts as a terminus of a communication flow between the host and the peripheral.
At design time each endpoint is assigned a unique number (endpoint identifier, see
Table
enumeration), the endpoint number and the transfer direction allows each endpoint to be
uniquely referenced.
The ISP1181B has 16 endpoints: endpoint 0 (control IN and OUT) plus 14 configurable
endpoints, which can be individually defined as interrupt/bulk/isochronous, IN or OUT.
Each enabled endpoint has an associated FIFO, which can be accessed either via the
parallel I/O interface or via DMA.
Table 4
mode access. Endpoints 1 to 14 also support DMA access. FIFO DMA access is selected
and enabled via bits EPIDX[3:0] and DMAEN of the DMA Configuration Register. A
detailed description of the DMA operation is given in
0
1
0
1
4). The combination of the peripheral address (given by the host during
lists the endpoint access modes and programmability. All endpoints support I/O
PIO width
D[15:1], AD0
reserved
D[7:1], AD0
reserved
16-bit I/O port shared with 16-bit DMA port
reserved
8-bit I/O port shared with 8-bit DMA port
reserved.
Rev. 05 — 25 August 2010
DMAWD = 0
-
reserved
D[7:1], AD0
reserved
DMA width
Section
DMAWD = 1
D[15:1], AD0
reserved
-
reserved
21.1.
Full-speed USB peripheral controller
multiplexed address/data on pin AD0;
Description
multiplexed address/data on pin AD0;
bus is shared by 16-bit I/O port and
16-bit DMA port
reserved
bus is shared by 8-bit I/O port and 8-bit
DMA port
reserved
Section
Table
10.
3. Typical interface
© ST-ERICSSON 2010. All rights reserved.
ISP1181B
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