PSD834F2-15M STMicroelectronics, PSD834F2-15M Datasheet - Page 22

• Manufacturer Part Number: PSD834F2-15M
• Manufacturer: STMicroelectronics

Specifications of PSD834F2-15M

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PQFP
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

PSD834F2V
Specific Features
Flash Memory Sector Protect. Each
and secondary Flash memory sector can be sepa-
rately protected against Program and Erase cy-
cles. Sector Protection provides additional data
security because it disables all Program or Erase
cycles. This mode can be activated through the
JTAG Port or a Device Programmer.
Sector protection can be selected for each sector
using the PSDsoft Express Configuration pro-
gram. This automatically protects selected sectors
when the device is programmed through the JTAG
Port or a Device Programmer. Flash memory sec-
tors can be unprotected to allow updating of their
Table 9. Sector Protection/Security Bit Definition – Flash Protection Register
Note: 1. Bit Definitions:
Table 10. Sector Protection/Security Bit Definition – PSD/EE Protection Register
Note: 1. Bit Definitions:
Reset Flash. The Reset Flash instruction con-
sists of one WRITE cycle (see Table 7). It can also
be optionally preceded by the standard two
WRITE decoding cycles (writing AAh to 555h and
55h to AAAh). It must be executed after:
– Reading the Flash Protection Status or Flash ID
– An Error condition has occurred (and the device
The Reset Flash instruction puts the Flash memo-
ry back into normal READ Mode. If an Error condi-
tion has occurred (and the device has set the Error
Flag Bit (DQ5) to '1') the Flash memory is put back
into normal READ Mode within 25 μs of the Reset
Flash instruction having been issued. The Reset
Flash instruction is ignored when it is issued dur-
22/95
Bit 7
Sec7_Prot
Bit 7
Security_Bit
has set the Error Flag Bit (DQ5) to '1') during a
Flash memory Program or Erase cycle.
Sec<i>_Prot 1 = Primary Flash memory or secondary Flash memory Sector <i> is write protected.
Sec<i>_Prot 0 = Primary Flash memory or secondary Flash memory Sector <i> is not write protected.
Sec<i>_Prot 1 = Secondary Flash memory Sector <i> is write protected.
Sec<i>_Prot 0 = Secondary Flash memory Sector <i> is not write protected.
Security_Bit 0 = Security Bit in device has not been set.
1 = Security Bit in device has been set.
Bit 6
Sec6_Prot
Bit 6
not used
Bit 5
Bit 5
Sec5_Prot
not used
Bit 4
Sec4_Prot
Bit 4
not used
primary
Bit 3
Bit 3
Sec3_Prot
Sec3_Prot
contents using the JTAG Port or a Device Pro-
grammer. The MCU can read (but cannot change)
the sector protection bits.
Any attempt to program or erase a protected Flash
memory sector is ignored by the device. The Verify
operation results in a READ of the protected data.
This allows a guarantee of the retention of the Pro-
tection status.
The sector protection status can be read by the
MCU through the Flash memory protection and
PSD/EE protection registers (in the CSIOP block).
See Table 9 and Table 10.
ing a Program or Bulk Erase cycle of the Flash
memory. The Reset Flash instruction aborts any
on-going Sector Erase cycle, and returns the
Flash memory to the normal READ Mode within
25 μs.
Reset (RESET) Signal. A pulse on Reset (RE-
SET) aborts any cycle that is in progress, and re-
sets the Flash memory to the READ Mode. When
the reset occurs during a Program or Erase cycle,
the Flash memory takes up to 25 μs to return to
the READ Mode. It is recommended that the Reset
(RESET) pulse (except for Power On Reset, as
described on page 61) be at least 25 μs so that the
Flash memory is always ready for the MCU to
fetch the bootstrap instructions after the Reset cy-
cle is complete.
Bit 2
Sec2_Prot
Bit 2
Sec2_Prot
Bit 1
Sec1_Prot
Bit 1
Sec1_Prot
Bit 0
Sec0_Prot
Bit 0
Sec0_Prot