PSD834F2-15M STMicroelectronics, PSD834F2-15M Datasheet - Page 52

• Manufacturer Part Number: PSD834F2-15M
• Manufacturer: STMicroelectronics

Specifications of PSD834F2-15M

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PQFP
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

PSD834F2V
Ports A and B – Functionality and Structure
Ports A and B have similar functionality and struc-
ture, as shown in Figure 24. The two ports can be
configured to perform one or more of the following
functions:
■
■
■
■
Figure 24. Port A and Port B Structure
52/95
MCU I/O Mode
CPLD Output – Macrocells McellAB7-McellAB0
can be connected to Port A or Port B. McellBC7-
McellBC0 can be connected to Port B or Port C.
CPLD Input – Via the Input Macrocells (IMC).
Latched Address output – Provide latched
address output as per Table 20.
ALE
ADDRESS
MACROCELL OUTPUTS
WR
WR
WR
ENABLE PRODUCT TERM ( .OE )
CONTROL REG.
CPLD - INPUT
DATA OUT
READ MUX
DIR REG.
G
D
D
D
D
REG.
D
B
P
Q
Q
Q
Q
A [ 7:0 ] OR A [ 15:8 ]
ADDRESS
■
■
■
■
■
DATA OUT
DATA IN
Address In – Additional high address inputs
using the Input Macrocells (IMC).
Open Drain/Slew Rate – pins PA3-PA0 and
PB3-PB0 can be configured to fast slew rate,
pins PA7-PA4 and PB7-PB4 can be configured
to Open Drain Mode.
Data Port – Port A to D7-D0 for 8-bit, non-
multiplexed bus
Multiplexed Address/Data port for certain types
of MCU bus interfaces.
Peripheral Mode – Port A only
OUTPUT
OUTPUT
SELECT
MUX
ENABLE OUT
MACROCELL
INPUT
A OR B PIN
PORT
AI02887