PSD834F2-15M STMicroelectronics, PSD834F2-15M Datasheet - Page 41

• Manufacturer Part Number: PSD834F2-15M
• Manufacturer: STMicroelectronics

Specifications of PSD834F2-15M

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PQFP
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

MCU Bus Interface Examples
Figure 18 to Figure 21 show examples of the basic
connections between the PSD and some popular
MCUs. The PSD Control input pins are labeled as
to the MCU function for which they are configured.
The MCU bus interface is specified using the PSD-
soft Express Configuration.
80C31. Figure 18 shows the bus interface for the
80C31, which has an 8-bit multiplexed address/
data bus. The lower address byte is multiplexed
Figure 18. Interfacing the PSD with an 80C31
Table 16. 80C251 Configurations
Configuration
RESET
RESET
1
2
3
4
15
12
13
14
80C251 READ/WRITE Pins
19
18
31
2
3
4
5
6
7
8
9
1
80C31
EA/VP
X1
X2
RESET
INT0
INT1
T0
T1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
PSEN only
PSEN only
PSEN
PSEN
WR
WR
WR
WR
RD
RD
ALE/P
PSEN
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
TXD
RXD
WR
RD
RESET
17
16
11
10
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
29
30
RD
PSEN
A8
A9
A10
A11
A12
A13
A15
WR
ALE
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A14
Connecting to PSD Pins
with the data bus. The MCU control signals Pro-
gram Select Enable (PSEN, CNTL2), Read Strobe
(RD, CNTL1), and Write Strobe (WR, CNTL0) may
be used for accessing the internal memory and I/
O Ports blocks. Address Strobe (ALE/AS, PD0)
latches the address.
80C251. The Intel 80C251 MCU features a user-
configurable bus interface with four possible bus
configurations, as shown in Table 16.
CNTL0
CNTL1
CNTL2
CNTL0
CNTL1
CNTL0
CNTL1
CNTL0
CNTL1
CNTL2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
30
31
32
33
34
35
36
37
42
39
40
41
43
44
45
46
47
50
49
10
48
8
9
PSD
ADIO0
ADIO1
ADIO3
ADIO4
ADIO5
ADIO6
ADIO7
ADIO8
ADIO9
ADIO10
ADIO11
ADIO12
ADIO13
ADIO14
ADIO15
CNTL0 (WR)
CNTL1(RD)
CNTL2 (PSEN)
PD0-ALE
PD1
PD2
RESET
ADIO2
AD7-AD0
Non-Page Mode, 80C31
compatible A7-A0 multiplex with
D7-D0
Non-Page Mode
A7-A0 multiplex with D7-D0
Page Mode
A15-A8 multiplex with D7-D0
Page Mode
A15-A8 multiplex with D7-D0
Page Mode
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC3
PC4
PC5
PC6
PC7
PC1
PC2
PSD834F2V
29
28
27
25
24
23
22
21
19
18
17
14
13
12
11
52
7
6
5
4
3
2
51
20
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