ISP1581BD NXP Semiconductors, ISP1581BD Datasheet - Page 18

• Manufacturer Part Number: ISP1581BD
• Manufacturer: NXP Semiconductors

Specifications of ISP1581BD

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
Table 4:
9397 750 13462
Product data
Name
DMA registers
DMA Command
DMA Transfer Counter
DMA Configuration
DMA Hardware
1F0 Task File
1F1Task File
1F2 Task File
1F3 Task File
1F4 Task File
1F5 Task File
1F6 Task File
1F7 Task File
3F6 Task File
3F7 Task File
DMA Interrupt Reason
DMA Interrupt Enable
DMA Endpoint
DMA Strobe Timing
General registers
Interrupt
Chip ID
Frame Number
Scratch
Test Mode
Register overview
Destination
DMA controller
DMA controller
DMA controller
DMA controller
ATAPI peripheral
ATAPI peripheral
ATAPI peripheral
ATAPI peripheral
ATAPI peripheral
ATAPI peripheral
ATAPI peripheral
ATAPI peripheral
ATAPI peripheral
ATAPI peripheral
DMA controller
DMA controller
DMA controller
DMA controller
device
device
device
device
PHY
…continued
Rev. 06 — 23 December 2004
Address
(Hex)
30
34
38 (byte 0)
39 (byte 1)
3C
40
48
49
4A
4B
4C
4D
44
4E
4F
50 (byte 0)
51 (byte 1)
54 (byte 0)
55 (byte 1)
58
60
18
70
74
78
84
Description
controls all DMA transfers
sets byte count for DMA Transfer
sets GDMA configuration (counter enable,
burst length, data strobing, bus width)
sets ATA configuration (IORDY enable,
mode selection: ATA/UDMA/MDMA/PIO)
endian type, master/slave selection, signal
polarity for DACK, DREQ, DIOW, DIOR
single address word register: byte 0 (lower
byte) is accessed first
IDE device access
IDE device access
IDE device access
IDE device access
IDE device access
IDE device access
IDE device access (write only; reading
returns FFH)
IDE device access
IDE device access
shows reason (source) for DMA interrupt
enables DMA interrupt sources
selects endpoint FIFO, data flow direction
strobe duration in UDMA/MDMA mode
shows interrupt sources
product ID code and hardware version
last successfully received Start Of Frame:
lower byte (byte 0) is accessed first
allows save/restore of firmware status
during ‘suspend’
direct setting of D , D states, internal
transceiver test (PHY)
Hi-Speed USB peripheral controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1581
Size
(bytes)
1
4
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
3
2
2
1
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