MC9S08AW60CFGE Freescale, MC9S08AW60CFGE Datasheet - Page 102
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MC9S08AW60CFGE
Manufacturer Part Number
MC9S08AW60CFGE
Description
Manufacturer
Freescale
Datasheet
1.MC9S08AW60CFGE.pdf
(336 pages)
Specifications of MC9S08AW60CFGE
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
34
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
60KB
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08AW60CFGE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC9S08AW60CFGER
Manufacturer:
Freescale Semiconductor
Quantity:
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Chapter 6 Parallel Input/Output
6.7.11
Port F parallel I/O function is controlled by the registers listed below.
102
Bits 7, 3 and 2 are reserved bits that must always be written to 0.
Bits 7, 3 and 2 are reserved bits that must always be written to 0.
PTFDDn
Reset
Reset
6:4, 1:0
6:4, 1:0
PTFDn
Field
Field
W
W
R
R
Port F I/O Registers (PTFD and PTFDD)
Port F Data Register Bits— For port F pins that are inputs, reads return the logic level on the pin. For port F
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port F pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTFD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullups disabled.
Data Direction for Port F Bits — These read/write bits control the direction of port F pins and what is read for
PTFD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port F bit n and PTFD reads return the contents of PTFDn.
R
R
0
0
7
7
PTFDD6
PTFD6
0
0
6
6
Figure 6-36. Data Direction for Port F (PTFDD)
Table 6-27. PTFDD Register Field Descriptions
Table 6-26. PTFD Register Field Descriptions
Figure 6-35. Port F Data Register (PTFD)
PTFDD5
MC9S08AC16 Series Data Sheet, Rev. 8
PTFD5
0
0
5
5
PTFDD4
PTFD4
0
0
4
4
Description
Description
R
R
3
0
3
0
1
R
R
0
0
2
2
1
PTFDD1
Freescale Semiconductor
PTFD1
0
0
1
1
PTFDD0
PTFD0
0
0
0
0
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