MCIMX253CJM4A Freescale, MCIMX253CJM4A Datasheet - Page 100

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MCIMX253CJM4A

Manufacturer Part Number
MCIMX253CJM4A
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX253CJM4A

Lead Free Status / RoHS Status
Compliant

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3.7.15
Figure 72
TRST timings for the SJC.
figures.
100
SIMx_SIMPDy
SIMx_RSTy
SIMx_CLKy
SI10
SIMx_RXy & SIMx_TXy
SIMx_VENy
SI7
SI8
SI9
ID
SIM reset to SIM clock stop
SIM reset to SIM Tx data low
SIM reset to SIM voltage enable low
SIM presence detect to SIM reset low
(Input)
TCK
through
System JTAG Controller (SJC) Timing
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 6
Figure 75
PARAMETER
SJ3
Table 75. Timing Requirements for Power-down Sequence
Figure 71. SmartCard Interface Power Down AC Timing
SI10
VIH
Table 76
show respectively the test clock input, boundary scan, test access port, and
Figure 72. Test Clock Input Timing Diagram
VIL
describes the SJC timing parameters (SJ1–SJ13) indicated in the
SI7
VM
SJ2
SI8
SYMBOL
S
S
S
S
rst2ven
rst2dat
rst2clk
pd2rst
SJ1
SI9
0.9
1.8
2.7
0.9
SJ3
SJ2
VM
Min.
1/Fckil
1/Fckil
1/Fckil
1/Fckil
1.1
2.2
3.3
1.1
Max.
Freescale Semiconductor
1/Fckil
1/Fckil
1/Fckil
1/Fckil
Unit
ns
ns
ns
ns

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