MCIMX253CJM4A Freescale, MCIMX253CJM4A Datasheet - Page 95
MCIMX253CJM4A
Manufacturer Part Number
MCIMX253CJM4A
Description
Manufacturer
Freescale
Datasheet
1.MCIMX253CJM4A.pdf
(142 pages)
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1
3.7.13
Figure 67
The PWM can be programmed to select one of three clock signals as its source frequency. The selected
clock signal is passed through a prescaler before being input to the counter. The output is available at the
pulse width modulator output (PWMO) external pin.
Freescale Semiconductor
T is pixel clock period
VSYNC
HSYNC
HSYNC
LSCLK
T1
T2
T3
T4
T5
T6
ID
OE
LD
depicts the timing of the PWM, and
HSYNC width
Pixel clock period
LD setup time
LD hold time
Delay from the end of HSYNC to the beginning of the OE pulse
Delay from end of OE to the beginning of the HSYNC pulse
Pulse Width Modulator (PWM) Timing Parameters
T2
Line 1
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 6
T5
Line 2
T3
T1
Table 70. LCDC TFT Mode Timing Parameters
Figure 66. LCDC TFT Mode Timing Diagram
T4
Description
Table 71
lists the PWM timing characteristics.
Line n
Min.
22.5
1
5
5
3
1
Line 1
1000
Ma
—
—
—
—
—
T6
Unit
ns
T
ns
ns
T
T
1
1
1
95
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