CYIL2SM1300AA-GWCES Cypress Semiconductor Corp, CYIL2SM1300AA-GWCES Datasheet - Page 37
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CYIL2SM1300AA-GWCES
Manufacturer Part Number
CYIL2SM1300AA-GWCES
Description
Manufacturer
Cypress Semiconductor Corp
Type
CMOSr
Datasheet
1.CYIL2SM1300AA-GWCES.pdf
(43 pages)
Specifications of CYIL2SM1300AA-GWCES
Sensor Image Color Type
Monochrome
Sensor Image Size Range
>= 480,000Pixels
Sensor Image Size
1280x1024Pixels
Operating Supply Voltage (typ)
2.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Lead Free Status / RoHS Status
Not Compliant
Table 21. Pin List (continued)
Document Number: 001-24599 Rev. *E
Pin No.
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
vddadc
vddlvds
clkinp
clkinn
syncp
syncn
gnddig
vdddig
cap_vrefm
cap_vrefp
gndadc
vddadc
gnddig
gndbuf
vddbuf
gndana
vddana
vpix
gndpix
vsamp
gndadc
vdddig
nbias_colload
test_ena
int_time1
int_time2
int_time3
monitor1
monitor2
monitor3
cap_vrefadc
vpix
cap_vrefcm
reset_n
scan_en
scan_clk
scan_clk_en
gndpix
gnddig
vdddig
vpix
Pin Name
Supply
Supply
Supply
Supply
Analog
Analog
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Analog
Analog
Supply
Analog
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Supply
LVDS
LVDS
LVDS
LVDS
Type
Direction
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
ADC power
LVDS power
LVDS input clock 315 MHz p-node
LVDS input clock 315 MHz n-node
LVDS sync and output
LVDS sync and output
digital ground
digital power supply
lower limit ADC range decoupling
higher limit ADC range decoupling
ADC ground
ADC power supply
digital ground
column buffers ground
column buffers supply
column buffers ground
column buffers supply
pixel core supply
pixel core ground
image core select and sample supply
ADC ground
digital power supply
column bias decouple
scan pin for sequencer; Customer: connect to ground
integration pin first slope
integration pin dual slope
integration pin triple slope
output pin for integration timing, high during integration
output pin for dual slope integration timing, high during
integration
output pin for triple slope integration timing, high during
integration
ADC black reference decoupling
pixel core supply
ADC common mode decoupling
chip reset (active low)
DFT scan enable; Customer: connect to ground
DFT clock; Customer: connect to ground
DFT clock enable; Customer: connect to ground
pixel core ground
digital ground
digital power supply
pixel core supply
Description
CYIL2SM1300AA
Page 37 of 43
V19
W19
W20
W22
V22
W23
T22
U21
T21
A24
C24
B23
A23
C22
C21
B21
B20
C19
B18
T17
U18
V20
W24
V24
U20
T20
U22
V23
U23
T23
U24
T24
C23
B22
A22
A21
C20
A20
B19
A19
C18
Position
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