RC82545EM 845633 Intel, RC82545EM 845633 Datasheet
RC82545EM 845633
Specifications of RC82545EM 845633
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RC82545EM 845633 Summary of contents
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Gigabit Ethernet Controller Networking Silicon Datasheet Revision 1.5 June 2005 ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel's website at http://www.intel.com. ...
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Contents 1.0 Introduction......................................................................................................................... 1 1.1 Document Scope................................................................................................... 2 1.2 Reference Documents...........................................................................................2 1.3 Product Code ........................................................................................................3 2.0 Features of the 82545EM Gigabit Ethernet Controller ....................................................... 5 2.1 PCI Features ......................................................................................................... 5 2.2 MAC Specific Features.......................................................................................... 5 2.3 PHY Specific Features .......................................................................................... ...
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Networking Silicon 4.2 Tristate Mode ...................................................................................................... 21 4.2.1 Tristate Mode Control and Operation ..................................................... 21 4.2.2 Tristate Mode Using JTAG (TAP)........................................................... 21 5.0 Voltage, Temperature, and Timing Specifications ........................................................... 23 5.1 Targeted Absolute Maximum Ratings ................................................................. 23 5.2 ...
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... The Intel 82545EM integrates Intel’s fourth generation gigabit MAC and PHY to provide a standard IEEE 802.3 Ethernet interface for 1000BASE-T, 100BASE-TX, and 10BASE-T applications (802.3, 802.3u, and 802.3ab). The controller is capable of transmitting and receiving data at rates of 1000 Mbps, 100 Mbps Mbps. In addition, it provides a 64-bit wide direct Peripheral Component Interconnect (PCI) 2 ...
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... Networking Silicon The 82545EM is packaged 364-ball grid array and footprint compatible with ® the Intel 82544GC Gigabit Ethernet Controller. Figure 1. Gigabit Ethernet Controller Block Diagram Design For Test Interface External TBI Interface LED's S/W Defined Pins 1.1 Document Scope ...
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... IEEE Standard 802.3ab, 1999 Edition, Institute of Electrical and Electronics Engineers (IEEE). ® • Intel Ethernet Controllers Timing Device Selection Guide, AP-419. Intel Corporation. 1.3 Product Code The product ordering code for the 82545EM is: RC82545EM. Datasheet Networking Silicon — 82545EM 3 ...
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Features of the 82545EM Gigabit Ethernet Controller 2.1 PCI Features PCI-X Revision 1.0a support for frequencies up to 133 MHz PCI Revision 2.2 support for 32-bit wide interface at 33 MHz and 66 MHz Algorithms that optimally use advanced ...
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Networking Silicon 2.3 PHY Specific Features Integrated PHY for 10/100/1000 Mbps full and half duplex operation IEEE 802.3ab Auto-Negotiation support IEEE 802.3ab PHY compliance and compatibility State-of-the-art DSP architecture implements digital adaptive equalization, echo cancellation, and cross- talk ...
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Manageability Features Manageability features ports: SMB port, ASF 1.0, ACPI, Wake on LAN, and PXE On-board SMB port Preboot eXecution Environment (PXE) Flash interface support (32-bit nd 64-bit) Compliance with PCI Power Management 1.1 and ACPI 2.0 register set ...
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... LOM designs easier • Single port or dual port implementation on the same board with minor option changes • Offers lowest geometry to minimize power and size while maintaining Intel quality reliability standards • Simple thermal design • Lower power requirements Benefits ...
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... Signal Descriptions Note: The targeted signal names are subject to change without notice. Verify with your local Intel sales office that you have the latest information before finalizing a design. 3.1 Signal Type Definitions The signals of the 82545EM controller are electrically defined as follows: ...
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Networking Silicon 3.2.1 PCI Address, Data and Control Signals Symbol Type AD[63:0] TS CBE[7:0]# TS PAR TS PAR64 TS FRAME# STS IRDY# STS TRDY# STS 10 Name and Function Address and data signals are multiplexed on the same ...
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Symbol Type STOP# STS IDSEL# I DEVSEL# STS VIO P 3.2.2 Arbitration Signals Symbol Type REQ64# TS ACK64# TS REQ# TS GNT# I LOCK# I 3.2.3 Interrupt Signal Symbol Type INTA# TS Datasheet Name and Function Stop. The Stop signal ...
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Networking Silicon 3.2.4 System Signals Symbol Type CLK I M66EN I RST# I LAN_ PWR_ I GOOD 3.2.5 Error Reporting Signals Symbol Type SERR# OD PERR# STS 3.2.6 Power Management Signals Symbol Type PME# OD AUX_PWR I 12 ...
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Impedance Compensation Signals Symbol Type ZN_COMP I/O ZP_COMP I/O 3.2.8 SMB Signals Note: A pull-up resistor with a recommended value of 4.7 KΩ should be placed along the SMB. A precise value may be calculated from the SMB specification. ...
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Networking Silicon 3.4 Flash Interface Signals Symbol Type FL_ADDR O [18:0] FL_CS# O FL_OE# O FL_WE# O FL_DATA TS [7:1] FL_DATA[0] /LAN_ TS DISABLE# 3.5 Miscellaneous Signals 3.5.1 LED Signals Symbol Type ACT# O LINK# O LINK100# O ...
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PHY Signals 3.6.1 Crystal Signals Symbol Type XTAL1 I XTAL2 O 3.6.2 Analog Signals Symbol Type REF P MDI[0]+/- A MDI[1]+/- A MDI[2]+/- A MDI[3]+/- A Datasheet Name and Function Crystal One. The Crystal One pin ...
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Networking Silicon 3.7 Serializer / Deserializer (SERDES) Signals Symbol Type RX +/- I TX +/- O SIG_ I DETECT 3.8 JTAG Test Interface Signals Symbol Type JTAG_TCK I JTAG_TDI I JTAG_TDO O JTAG_TMS I JTAG_ I TRST# CLK_VIEW ...
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Digital Supplies Symbol Type VDDO P DVDD P 3.9.3 Analog Supplies Symbol Type AVDDH P AVDDL P 3.9.4 Ground and No Connects Symbol Type GND Reserved R Datasheet Name and Function 3.3 V I/O Power Supply. ...
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Test Port Functionality 4.1 XOR Testing A common board or system-level manufacturing test for proper electrical continuity between a silicon component and the board is some type of cascaded-XOR or NAND tree test. The 82545EM implements an XOR tree ...
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Networking Silicon I/O pins with dual-mode function for XOR test: Pin Name FLSH_CE_N When XOR tree test is selected, the following pin behavior(s) occur: • Output drivers for the pins listed as tested are all placed in high-impedance ...
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Pins not included in XOR test tree: • JTAG (TAP) interface: TRST_N, TCK, TDO, TMS, and TDO • Test mode decode controls TEST_DM_N, EWRAP, CLK_BYP_N, CLK_VIEW, and SDP_B[7] • Each internal PHY's analog signals including PHYREF, MDI +/-, and PHY_HSDACP/N ...
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... Voltage, Temperature, and Timing Specifications Note: The specification values listed in this section are subject to change without notice. Verify with your local Intel sales office that you have the latest information before finalizing a design. 5.1 Targeted Absolute Maximum Ratings Table 2. Absolute Maximum Ratings ...
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Networking Silicon Table 3. Recommended Operating Conditions Symbol Input rise/fall time (normal input) tr/tf input rise/fall time (Schmitt input) Operating temperature range TA (ambient) TJ Junction temperature a. Sustained operation of the device at conditions ...
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Table 5.b Unplugged/No Link a Typ Icc (mA 1.5 V 190 Total Device 650 mW Power a. Typical conditions: operating temperature (TA nominal voltages, moderate network traffic at full duplex, and ...
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Networking Silicon I Table 5.d D3cold / Wake a Typ Icc (mA 1.5 V 170 Subsystem 3.3 V Current a. Typical conditions: operating temperature (TA nominal voltages, moderate network ...
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Table 6. I/O Characteristics Symbol Voltage input HIGH IH V Voltage output LOW OL V Voltage output HIGH OH V Schmitt Trigger Hysteresis SH Output current LOW 12mA drivers (TTL12) Output current HIGH a ...
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Networking Silicon Table 8. 25 MHz Clock Input Requirements Symbol fi_TX_CLK TX_CLK_IN frequency a. This parameter applies to an oscillator connected to the Crystal One (XTAL1) input. Alternatively, a crystal may be connected to XTAL1 and XTAL2 as ...
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Serial Interface Specifications Table 12. Driver Characteristics Symbol Parameter Differential Output V OD Voltage Swing V Output Offset Voltage OS Change in V Delta and 1 Differential Output R O Impedance Output Current on Short I ...
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... Networking Silicon 5.6 Timing Specifications Note: Timing specifications are preliminary and subject to change. Verify with your local Intel sales office that you have the latest information before finalizing a design. 5.6.1 PCI/PCI-X Bus Interface 5.6.1.1 PCI/PCI-X Bus Interface Clock Table 14. PCI/PCI-X Bus Interface Clock Parameters ...
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PCI/PCI-X Bus Interface Timing Table 15. PCI/PCI-X Bus Interface Timing Parameters Symbol Parameter CLK to signal valid delay: TVAL bussed signals TVAL CLK to signal valid delay: (ptp) point-to-point signals TON Float to active delay TOFF Active to float ...
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Networking Silicon Figure 6. PCI Bus Interface Input Timing Measurement Conditions PCI_CLK Input Table 13. PCI Bus Interface Timing Measurement Conditions Symbol VTH Input measurement test voltage (high) VTL Input measurement test voltage (low) VTEST Output measurement test ...
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Figure 8. TVAL (max) Falling Edge Test Load 5.6.2 Link Interface Timing 5.6.2.1 Link Interface Rise and Fall Time Table 16. Rise and Fall Times Symbol Parameter TR Clock rise time TF Clock fall time TR Data rise time TF ...
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Networking Silicon 5.6.2.2 Link Interface Transmit Timing Figure 10. Transmit Interface Timing TX_CLOCK TX_DATA[9:0] Table 17. Transmit Interface Timing Symbol GTX_CLK period TPERIOD TBI mode (1000 Mbps) TSETUP Data setup to rising GTX_CLK THOLD Data hold from rising ...
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Link Interface Receive Timing Figure 11. Receive Interface Timing RBC1 RX_DATA[9:0] COM_DET RBC0 Table 18. Transmit Interface Timing Symbol RBC0/RBC1 frequency TREQ TBI mode (1000 Mbps) TSETUP Data setup before rising RBC0/RBC1 THOLD Data hold after rising RBC0/RBC1 TDUTY ...
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Networking Silicon 5.6.3 Flash Interface Figure 12. Flash Read Timing Flash Address [18:0] Table 19. Flash Read Operation Timing Symbol TCE Flash CE# or OE# to read data delay TACC Flash address setup time THOLD Data hold time ...
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Table 20. Flash Write Operation Timing Symbol TWE Flash write pulse width (WE#) TAH Flash address hold time TDS Flash data setup time 5.6.4 EEPROM Interface Table 21. Link Interface Clock Requirements Symbol TPW EE_SK pulse width Table 22. Link ...
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... The 82545EM device is a 364-lead ball grid array (BGA) measuring 21 mm dimensions are detailed in the figures below. The nominal ball pitch is 1 mm. Datasheet Networking Silicon — 82545EM ® RC82545EM Intel©'ZZ YYWW Tnnnnnnnn A1 Country Product Name Date Code Lot Trace Code ...
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Networking Silicon Figure 15. 82545EM 364-Lead BGA Ball Pad Dimensions 40 Detail Area 0.40 +/- 0.05 mm Solder Mask Opening 0.55 +/- 0.05 mm Pad Size Datasheet ...
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Figure 16. 82545EM Mechanical Specifications Datasheet Networking Silicon — 82545EM 1.00 19.00 21.00±0.10 0.20 MAX 1.70 0.30~0.50 (0.36) C 0.25 41 ...
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Networking Silicon 6.3 Thermal Specifications The 82545EM device is specified for operation when the ambient temperature (TA) is within the range of 0° C (minimum ambient temperature) to 70° C (maximum ambient temperature). The maximum junction temperature for ...
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Ball Mapping Diagram Note: The 82545EM device uses five categories of VDD connections: VDDO (3.3 V), AVDDH (Analog 3.3 V), AVDDL (Analog 2.5 V), and DVDD (1.5 V ...
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Networking Silicon Table 24. PCI Address, Data, and Control Signals Signal PCI_AD[3] PCI_AD[4] PCI_AD[5] PCI_AD[6] PCI_AD[7] PCI_AD[8] PCI_AD[9] PCI_AD[10] PCI_AD[11] PCI_AD[12] PCI_AD[13] PCI_AD[14] PCI_AD[15] PCI_AD[16] PCI_AD[17] PCI_AD[18] PCI_AD[19] PCI_AD[20] PCI_AD[21] PCI_AD[22] PCI_AD[23] PCI_AD[24] PCI_AD[25] PCI_AD[26] PCI_AD[27] Table 25. ...
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Table 27. System Signals Signal CLK Table 28. Error Reporting Signals Signal SERR# Table 29. Power Management Signals Signal LAN_PWR_ GOOD Table 30. Impedance Compensation Signals Signal ZN_COMP Table 31. SMB Signals Signal SMBCLK Table 32. EEPROM Interface Signals Signal ...
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Networking Silicon Table 33. Flash Interface Signals Signal FL_ADDR[7] FL_ADDR[8] FL_ADDR[9] Table 34. LED Signals Signal ACT# LINK# Table 35. Software Definable Signals Signal SDP[0] SDP[1] Table 36. PHY Signals Signal XTAL1 XTAL2 REF MDI0- Table 37. Serializer/Deserializer ...
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Table 39. Power Support Signals Signal CTRL_15 Table 40. Digital Power Signals Signal VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO (3.3V) VDDO ...
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Networking Silicon Table 42. Grounds and No Connect Signals Signal GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND ...
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Table 43. Reserved Signals Signal Reserved[3] Reserved[4] Reserved[5] Reserved[6] Reserved[7] Reserved[8] Reserved[9] Reserved[10] Datasheet Pin Signal Pin E4 Reserved[14 Reserved[15 Reserved[16 Reserved[17 Reserved[18 Reserved[19] D10 C7 Reserved[20] A9 E10 Reserved[21] ...
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