77V550S25DTG8 IDT, Integrated Device Technology Inc, 77V550S25DTG8 Datasheet - Page 2

• Manufacturer Part Number: 77V550S25DTG8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 77V550S25DTG8

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 80
• Lead Free Status / RoHS Status: Compliant

transmitted to the external workstation via a generated cell. Please refer
to the data sheet of the IDT77V500 Switch Controller and the SwitchStar
User Manual for additional information on these commands.
the IDT Web Site at:
http://www.idt.com/products/pages/ATM-PL114_Sub227_Dev285.html.
input interface, and they are interpreted in the cell receiver. If the
received cell VPI/VCI address matches the VPI/VCI expected for a
command cell the Switch Manager begins executing the command. The
switch command cell is filtered out by the Switch Manager.
internal cell receiver of the IDT77V550 stores up to 32 data bytes to
internal memory. Then the IDT77V550 writes the data to the IDT77V500
Switch Controller using the eight bit Manager bus interface. Finally the
Switch Manager will write the switch control instruction to the instruction
register in the Switch Controller.
Manager reads the appropriate number of the bytes and stores them
internally. The data is returned to the external control source on the
lower cell stream of the port (see Figure 2). The cell generator will look
for a space in the cell stream before stopping the DPI read clock and
inserting the Switch Manager generated cell.
Each command cell received by the switch manager must be processed
prior to receiving another command cell.
drive the Manager Bus based on the command received. It is necessary
to wait for an acknowledgment from the IDT77V500 Switch Controller
IDT77V550
The switch command cell enters the Switch Manager at the Port DPI
For a write data switch command to the Switch Controller, the
For a read data switch command to the Switch Controller, the Switch
The switch manager can only process one command cell at a time.
Once the IDT77V550 is finished processing the command cell, it will
Additional information on DPI is available in Technical Note 34 on
DPI output Port
DPI input Port
Output
Input
DPI
DPI
I/F
I/F
Figure 2 Basic Block Configuration of the Switch Manager
Cell generator
Cell receiver
2 of 19
controller
R/W
that the command sent by the IDT77V550 has been received and
processed by the IDT77V500. Acknowledgment means the IDT77V500
sets MDATA 7 high after a command has been executed. The
IDT77V550 can not receive or process another command cell until it
receives this acknowledgment from the IDT77V500.
Revision History
Revision History
Changed name of table to Command Field format and added informa-
tion and note. Changed waveforms to include SCLK.
Changed pin definitions in Pin definitions table. Changed data in several
tables. Made changes to Table 23, AC Electrical Characteristics. Made
changes to Order Information section.
tions section. Made changes in last row of Table 23, AC Electrical Char-
acteristics. Edited timing waveforms and added new waveform.
information in Switch Manager Commands section. Deleted tRESTED
row in Table 23. Deleted Command Cell Execution Delay Timing Wave-
form.
minor edits.
3) to read 12 mm x 12 mm x 1.4 mm.
Figure 10. Removed “All resets will be asserted by the Switch Manager
for at least 1.5us” from Reset Operations section.
February 15, 1999: Initial publication.
September 2, 1999: Added line to paragraph in DPI Receive Path.
February 4, 2000: Changed pin in Pin Configuration diagram.
March 24, 2000: Made changes to last paragraph in Device Opera-
July 28, 2000: Added paragraph to Device Operation section. Added
November 2, 2000: Updated QFP80 Package and made several
March 26, 2001: Corrected package dimensions (Note 3 for Figure
June 22, 2001: Added a Note 6 to Figure 9 and another Note 6 to
Output
Input
DPI
Mgr
DPI
I/F
I/F
I/F
DPI output to Switching Memory
Control bus for Switch Controller
DPI input from Switching Memory
4523 drw 02
June 22, 2001
,