IS43R16800CC-6TL ISSI, Integrated Silicon Solution Inc, IS43R16800CC-6TL Datasheet - Page 29

• Manufacturer Part Number: IS43R16800CC-6TL
• Description: DRAM 128M (8Mx16) 166MHz Commercial Temp
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: DDR SDRAMr

Specifications of IS43R16800CC-6TL

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 700ps
• Maximum Clock Rate: 167MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Supply Current: 250mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Data Bus Width: 16 bit
• Package / Case: TSOP-66
• Memory Size: 128 MB
• Maximum Clock Frequency: 166 MHz
• Access Time: 0.7 ns
• Supply Voltage (max): 2.7 V
• Supply Voltage (min): 2.3 V
• Maximum Operating Current: 250 A
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Compliant

DDR SDRAM (Rev.1.1)
IS43R16800CC
Integrated Silicon Solution, Inc.
Rev. 00A
11/24/08
[Read Interrupted by Burst Stop]
is minimum 1 CLK. A TERM command to output disable latency is equivalent to the /CAS Latency.
As a result, READ to TERM interval determines valid data length to be output. The figure below
shows examples of BL=8.
Burst read operation can be interrupted by a burst stop command(TERM). READ to TERM interval
CL=2.0
CL=2.5
Command
Command
Command
Command
Command
Command
Preliminary
DQS
DQS
DQS
DQS
Preliminary
/CLK
DQS
DQS
CLK
DQ
DQ
DQ
DQ
DQ
DQ
READ
READ
Read Interrupted by TERM (BL=8)
READ
READ
READ
READ
TERM
TERM
TERM
TERM
Q0
Q0
Q0
256M Double Data Rate Synchronous DRAM
Q1
Q1
Q1
TERM
Q0
Q0
TERM
Q0
Q2
Q2
Q1
Q1
Q1
Q3
Q3
Q2
Q2
Q4
Q3
Q3
Q5
Q4
Q5
A3S56D30/40ETP
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