MT48LC16M4A2P-75 IT:G Micron Technology Inc, MT48LC16M4A2P-75 IT:G Datasheet - Page 64

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MT48LC16M4A2P-75 IT:G

Manufacturer Part Number
MT48LC16M4A2P-75 IT:G
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC16M4A2P-75 IT:G

Organization
16Mx4
Density
64Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Figure 47:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
DQML, DQMH
COMMAND
A0-A9, A11
BA0, BA1
DQM /
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
WRITE – Without Auto Precharge
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
Notes:
t AH
t AH
t AH
t RCD
t RAS
t RC
t CK
T1
1. For this example, BL = 4, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 15ns is required between <D
3. x16: A8, A9 and A11 = “Don’t Care”
NOP
frequency.
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
DISABLE AUTO PRECHARGE
t CMS
t CL
t DS
COLUMN m 3
WRITE
T2
BANK
D
IN
t CMH
t CH
t DH
m
t DS
D
T3
IN
NOP
m + 1
t DH
64
IN
t DS
D
m> and the PRECHARGE command, regardless of
T4
IN
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DS
D
IN
NOP
T5
m + 3
t DH
t WR
SINGLE BANK
PRECHARGE
ALL BANKS
2
BANK
T6
64Mb: x4, x8, x16 SDRAM
©2000 Micron Technology, Inc. All rights reserved.
NOP
t RP
T7
Timing Diagrams
ACTIVE
ROW
BANK
ROW
T8
DON’T CARE

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