IDTQS3388Q8 IDT, Integrated Device Technology Inc, IDTQS3388Q8 Datasheet - Page 5

• Manufacturer Part Number: IDTQS3388Q8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDTQS3388Q8

• Lead Free Status / RoHS Status: Not Compliant

ACTIVE TERMINATOR OR ‘BUS-HOLD’ CIRCUIT
or CMOS input port, the Bus-hold circuit holds the last logic state at the input when the input is “disconnected” from the driver. When the output of a device
connected to such an input attempts a logic level transition, it will over-drive the Bus-hold circuit. The primary benefit of this circuit is that it prevents CMOS
inputs from floating, a situation which should be avoided to prevent spurious switching of inputs and unnecessary power dissipation. Bus-hold is a better
solution than the traditional approach of using resistive termination to V
any static power.
V-I CHARACTERISTICS OF BUS-HOLD CIRCUIT
is increased from 0 volts, the ‘sink’ current increases linearly. When the TTL threshold of the circuit is reached (typically 1.5 volts), the latch changes the
logic state due to positive feedback and the direction of current is reversed. As the voltage is further increased towards V
begins to decrease, reaching the lowest level at V
IDTQS3388
HIGH-SPEED CMOS BUS EXCHANGE SWITCH WITH ACTIVE TERMINATION
The Active Terminator circuit, also known as the Bus-hold circuit, is configured as a “weak latch” with positive feedback. When connected to a TTL
The figure above shows the input V-I characteristics of a Bus-hold implementation. The input characteristics resemble a resistor. As the input voltage
I
Current
I
I
I
Sourcing
I
Sinking
B H
BHL
B H
BH H
B H
Current
( + )
( – )
– 500
+ 500
– 20
– 60
+60
+20
0.8V
+60 I
V
IL
IN =
B HL
V
CC.
V
T
≡ ≡ ≡ ≡ ≡ Threshold Voltage ≈ 1.5V
V
V
T
IL
CC
≈ .8
or GND to prevent bus floating, because the Bus-hold circuit does not consume
2V
5
V
V
IH
– 60 I
IH
≈ 2V
BHH
INDUSTRIAL TEMPERATURE RANGE
Vcc
CC
, the input ‘source’ current
+ 20 I
– 20 I
Voltage
BH
BH