MB86297EB01 Fujitsu, MB86297EB01 Datasheet - Page 19

• Manufacturer Part Number: MB86297EB01
• Description: BOARD, EVAL, PCI, CARMINE, MB86297
• Manufacturer: Fujitsu

Specifications of MB86297EB01

• Silicon Manufacturer: Fujitsu
• Silicon Core Number: MB86297
• Kit Contents: Board
• Features: 128Mbyte DDR SDRAM Memory, Video Outputs, Video Input
• Application Sub Type: PCI Graphics Display Controller
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

D
C
B
A
RGBAN_IN_DIS#
VI0_RGB[2..0]
VI_CTRL0
I2C[1..0]
VCC33
VI0_RGB[2..0]
R GBAN_IN_DIS#
VI_CTRL0
I2C[1..0]
L202
BLM18PG600SN1
Place filter network directly
to U201 power pins!
5
5
GND_RGBI
C215
1n
I2C0
I2C1
C216
100n
I2C_SCL
I2C_SDA
C217
10u
VI0_RGB_D1
VI0_RGB_D3
VI0_RGB_D5
VI0_RGB_D7
VI0_RGB_D9
VI0_RGB_D11
VI0_RGB_D13
VI0_RGB_D15
VI0_RGB_D17
VI0_HS YNC
VI0_VSYNC
GND_RGBI
Digital RGB input cable
must tie pin 22 and 24
together in order to avoid
digital RGB input bus
conflict with ADC!
16
15
14
13
12
11
10
9
U201
FSAV430MTC
VCC
OE
4B1
4B2
4A
3B1
3B2
3A
FTSH-112-01-L-DV-ES
C218
C219
C221
X200
FTSH-105-01-L-DV
10
11
13
15
17
19
21
23
2
4
6
8
1
3
5
7
9
FSAV430
X201
33p
33p
33p
1
3
5
7
9
2
4
6
8
10
12
14
16
18
20
22
24
GND
1B1
1B2
2B1
2B2
1A
2A
S
1
2
3
4
5
6
7
8
VCC33
VI0_RGB_D0
VI0_RGB_D2
VI0_RGB_D4
VI0_RGB_D6
VI0_RGB_D8
VI0_RGB_D10
VI0_RGB_D12
VI0_RGB_D14
VI0_RGB_D16
VI0_RGB_CLK
R GBAN_IN_DIS#
R200
10k
GND_RGBI
L203
L204
L205
4
4
VCC33
R210
R211
BLM18PG600SN1
BLM18PG600SN1
BLM18PG600SN1
0R
0R
R213
4k7
Short traces, no vias
for all analog signals!
C211
C212
C213
I2C addresses
of ADV9883
read: 0x99,
write: 0x98
VCC_PLL_ADC
R203
R205
R208
VI0_EXT_HS
VI0_EXT_VS
47n
47n
47n
GND_RGBI
0R
0R
0R
C223
C224
82n
8n2
R201
R202
R204
R206
R209
NP
0R
0R
75R
75R
75R
R212
C214
GND_RGBI
GND_RGBI
VCC33
2k7
C220
C222
I2C_SDA
I2C_SCL
C200
1n
47n
100n
100n
C201
100n
AD9883ABSTZ-RL140
Consider ADV9883 layout rules!
54
48
43
49
38
29
30
31
57
56
55
58
37
33
RAIN
GAIN
BAIN
SOGIN
CLAMP
COAST
HSYNC
VSYNC
SDA
SCL
A0
REF_BYP
MIDSCV
FILT
U200
3
C202
100n
3
Digital supply
Place filter networks directly
to U200 power pins!
C203
10u
Video ADC
ADV9883
L206
BLM18PG600SN1
Analog supply
GND
C204
1n
GND_RGBI
C205
100n
PLL supply
GND_RGBI
C206
100n
SOGOUT
HSOUT
VSOUT
DTACK
GDO7
GDO6
GDO5
GDO4
GDO3
GDO2
GDO1
GDO0
GND_RGBI
RDO7
RDO6
RDO5
RDO4
RDO3
RDO2
RDO1
RDO0
BDO7
BDO6
BDO5
BDO4
BDO3
BDO2
BDO1
BDO0
C207
10u
70
71
72
73
74
75
76
77
2
3
4
5
6
7
8
9
12
13
14
15
16
17
18
19
65
66
64
67
Place RN200 - RN204, R207 directly
to the corresponding U200 pins!
L200
BLM18PG600SN1
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
R207
VCC33
RN200
33Rx4
RN201
33Rx4
RN202
33Rx4
RN203
33Rx4
RN204
33Rx4
2
2
33R
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
VCC_PLL_ADC
C208
1n
C209
100n
GND_RGBI
C210
10u
L201
BLM18PG600SN1
R GBAN_IN_DIS#
VI0_HS YNC
VI0_VSYNC
VI0_R5
VI0_R4
VI0_R3
VI0_R2
VI0_R1
VI0_R0
VI0_G5
VI0_G4
VI0_G3
VI0_G2
VI0_G1
VI0_G0
VI0_B5
VI0_B4
VI0_B3
VI0_B2
VI0_B1
VI0_B0
VI0_EXT_HS
VI0_EXT_VS
10
11
12
13
14
15
16
18
20
21
22
23
24
25
26
27
28
56
55
2
3
4
5
6
7
9
U202
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
1A10
1A11
1A12
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2A11
2A12
1OE1
2OE
C225
100n
VCC33
VI0_RGB_SYNC0
VI0_RGB_SYNC1
VI0_RGB_D17
VI0_RGB_D16
VI0_RGB_D15
VI0_RGB_D14
VI0_RGB_D13
VI0_RGB_D12
VI0_RGB_D11
VI0_RGB_D10
VI0_RGB_D9
VI0_RGB_D8
VI0_RGB_D7
VI0_RGB_D6
VI0_RGB_D5
VI0_RGB_D4
VI0_RGB_D3
VI0_RGB_D2
VI0_RGB_D1
VI0_RGB_D0
VI0_EXT_SYNC0
VI0_EXT_SYNC1
C226
10u
Title
Size
Date:
1B10
1B11
1B12
2B10
2B11
2B12
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
1B9
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
© mycable GmbH
Boeker Stieg 43
D-24613 Aukrug
Germany
www.mycable.de
A2
NC
FST16211MTDX
54
53
52
51
50
48
47
46
45
44
43
42
41
40
39
37
36
35
34
33
32
31
30
29
1
Fujitsu Carmine Evaluation Board: Video Input: RGB
Document Number
30101-004
Monday, November 21, 2005
C227
100n
VI0_R GB_SYNC[1..0]
VI0_RGB_D[17..0]
VI0_EXT_SYNC[1..0]
VCC50
VI0_R5
VI0_R4
VI0_R3
VI0_R2
VI0_R1
VI0_R0
VI0_G5
VI0_G4
VI0_G3
VI0_G2
VI0_G1
VI0_G0
VI0_B5
VI0_B4
VI0_B3
VI0_B2
VI0_B1
VI0_B0
VI0_HS YNC
VI0_VSYNC
VI0_RGB_CLK
1
1
Sheet
VI0_RGB_CLK
VI0_RGB_SYNC[1..0]
VI0_RGB_D[17..0]
VI0_EXT_SYNC[1..0]
4
o f
15
R ev
PA11
D
C
B
A