PIC16F1526-I/PT Microchip Technology, PIC16F1526-I/PT Datasheet - Page 177
![MCU 14KB FLASH 768B RAM 64-TQFP](/photos/16/3/160367/tqfp-64_sml.jpg)
PIC16F1526-I/PT
Manufacturer Part Number
PIC16F1526-I/PT
Description
MCU 14KB FLASH 768B RAM 64-TQFP
Manufacturer
Microchip Technology
Datasheet
1.PIC16F1526-IPT.pdf
(354 pages)
Specifications of PIC16F1526-I/PT
Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
768 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
9
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
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Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1526-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F1526-I/PT
Manufacturer:
MICROCHIP/微芯
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20 000
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18.12 Timer1/3/5 Gate Control Register
The Timer1/3/5 Gate Control register (TxGCON),
shown in
Gate.
REGISTER 18-2:
2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
TMRxGE
R/W-0/u
Register
See
TMRxGE: Timer1/3/5 Gate Enable bit
If TMRxON = 0 :
This bit is ignored
If TMRxON = 1 :
1 = Timer1/3/5 counting is controlled by the Timer1/3/5 gate function
0 = Timer1/3/5 counts regardless of Timer1/3/5 gate function
TxGPOL: Timer1/3/5 Gate Polarity bit
1 = Timer1/3/5 gate is active-high (Timer1/3/5 counts when gate is high)
0 = Timer1/3/5 gate is active-low (Timer1/3/5 counts when gate is low)
TxGTM: Timer1/3/5 Gate Toggle Mode bit
1 = Timer1/3/5 Gate Toggle mode is enabled
0 = Timer1/3/5 Gate Toggle mode is disabled and toggle flip-flop is cleared
Timer1/3/5 gate flip-flop toggles on every rising edge.
TxGSPM: Timer1/3/5 Gate Single-Pulse Mode bit
1 = Timer1/3/5 Gate Single-Pulse mode is enabled and is controlling Timer1/3/5 gate
0 = Timer1/3/5 Gate Single-Pulse mode is disabled
TxGGO/DONE: Timer1/3/5 Gate Single-Pulse Acquisition Status bit
1 = Timer1/3/5 gate single-pulse acquisition is ready, waiting for an edge
0 = Timer1/3/5 gate single-pulse acquisition has completed or has not been started
TxGVAL: Timer1/3/5 Gate Current State bit
Indicates the current state of the Timer1/3/5 gate that could be provided to TMRxH:TMRxL.
Unaffected by Timer1/3/5 Gate Enable (TMRxGE).
TxGSS<1:0>: Timer1/3/5 Gate Source Select bits
00 = Timer1/3/5 gate pin
01 = Timer0 overflow output
10 = Timer2/4/6/8 match PR2/PR4/PR6/PR8
11 = Timer10 match PR10
Table 18-4
TxGPOL
R/W-0/u
18-2, is used to control Timer1/3/5
TXGCON: TIMER1/3/5 GATE CONTROL REGISTER
for Timer selection.
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/u
TxGTM
TxGSPM
R/W-0/u
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HC = Bit is cleared by hardware
R/W/HC-0/u
(1)
TxGGO/
DONE
PIC16(L)F1526/27
TxGVAL
R-x/x
R/W-0/u
TxGSS<1:0>
DS41458A-page 177
R/W-0/u
bit 0
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