PIC16F1526-I/PT Microchip Technology, PIC16F1526-I/PT Datasheet - Page 46
![MCU 14KB FLASH 768B RAM 64-TQFP](/photos/16/3/160367/tqfp-64_sml.jpg)
PIC16F1526-I/PT
Manufacturer Part Number
PIC16F1526-I/PT
Description
MCU 14KB FLASH 768B RAM 64-TQFP
Manufacturer
Microchip Technology
Datasheet
1.PIC16F1526-IPT.pdf
(354 pages)
Specifications of PIC16F1526-I/PT
Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
768 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
9
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1526-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F1526-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16(L)F1526/27
REGISTER 4-1:
DS41458A-page 46
bit 7
Legend:
R = Readable bit
‘0’ = Bit is cleared
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4-3
R/P-1
CP
FCMEN: Fail-Safe Clock Monitor Enable bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
IESO: Internal External Switchover bit
1 = Internal/External Switchover mode is enabled
0 = Internal/External Switchover mode is disabled
CLKOUTEN: Clock Out Enable bit
If FOSC configuration bits are set to LP, XT, HS modes:
All other FOSC modes:
BOREN<1:0>: Brown-out Reset Enable bits
11 = BOR enabled
10 = BOR enabled during operation and disabled in Sleep
01 = BOR controlled by SBOREN bit of the BORCON register
00 = BOR disabled
Unimplemented: Read as ‘1’
CP: Code Protection bit
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: MCLR/V
If LVP bit = 1:
If LVP bit = 0:
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE<1:0>: Watchdog Timer Enable bit
11 = WDT enabled
10 = WDT enabled while running and disabled in Sleep
01 = WDT controlled by the SWDTEN bit in the WDTCON register
00 = WDT disabled
MCLRE
R/P-1
This bit is ignored.
1 = MCLR/V
0 = MCLR/V
This bit is ignored, CLKOUT function is disabled. Oscillator function on the CLKOUT pin.
1 = CLKOUT function is disabled. I/O function on the CLKOUT pin.
0 = CLKOUT function is enabled on the CLKOUT pin
CONFIGURATION WORD 1
WPUE3 bit.
bit 13
P = Programmable bit
‘1’ = Bit is set
PP
PP
PWRTE
FCMEN
PP
R/P-1
R/P-1
pin function is MCLR; Weak pull-up enabled.
pin function is digital input; MCLR internally disabled; Weak pull-up under control of
Pin Function Select bit
R/P-1
R/P-1
IESO
Preliminary
WDTE<1:0>
U = Unimplemented bit, read as ‘1’
-n = Value when blank or after Bulk Erase
CLKOUTEN
R/P-1
R/P-1
R/P-1
R/P-1
BOREN<1:0>
2011 Microchip Technology Inc.
FOSC<2:0>
R/P-1
R/P-1
R/P-1
U-1
—
bit 8
bit 0
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