PIC16F1526-I/PT Microchip Technology, PIC16F1526-I/PT Datasheet - Page 267
![MCU 14KB FLASH 768B RAM 64-TQFP](/photos/16/3/160367/tqfp-64_sml.jpg)
PIC16F1526-I/PT
Manufacturer Part Number
PIC16F1526-I/PT
Description
MCU 14KB FLASH 768B RAM 64-TQFP
Manufacturer
Microchip Technology
Datasheet
1.PIC16F1526-IPT.pdf
(354 pages)
Specifications of PIC16F1526-I/PT
Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
768 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
9
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1526-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F1526-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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22.4
The Baud Rate Generator (BRG) is an 8-bit or 16-bit
timer that is dedicated to the support of both the
asynchronous and synchronous EUSART operation.
By default, the BRG operates in 8-bit mode. Setting the
BRG16 bit of the BAUDxCON register selects 16-bit
mode.
The SPxBRGH:SPxBRGL register pair determines the
period of the free running baud rate timer. In
Asynchronous mode the multiplier of the baud rate
period is determined by both the BRGH bit of the
TXxSTA register and the BRG16 bit of the BAUDxCON
register. In Synchronous mode, the BRGH bit is ignored.
Example 22-1
mining the desired baud rate, actual baud rate, and
baud rate % error.
Typical baud rates and error values for various
Asynchronous modes have been computed for your
convenience and are shown in
advantageous to use the high baud rate (BRGH = 1 ),
or the 16-bit BRG (BRG16 = 1 ) to reduce the baud rate
error. The 16-bit BRG mode is used to achieve slow
baud rates for fast oscillator frequencies.
Writing a new value to the SPxBRGH, SPxBRGL
register pair causes the BRG timer to be reset (or
cleared). This ensures that the BRG does not wait for a
timer overflow before outputting the new baud rate.
TABLE 22-3:
2011 Microchip Technology Inc.
Legend:
SYNC
0
0
0
0
1
1
EUSART Baud Rate Generator
(BRG)
x = Don’t care, n = value of SPxBRGH, SPxBRGL register pair
Configuration Bits
provides a sample calculation for deter-
BAUD RATE FORMULAS
BRG16
0
0
1
1
0
1
Table
BRGH
0
1
0
1
x
x
22-5. It may be
Preliminary
BRG/EUSART Mode
16-bit/Asynchronous
16-bit/Asynchronous
16-bit/Synchronous
8-bit/Asynchronous
8-bit/Asynchronous
8-bit/Synchronous
If the system clock is changed during an active receive
operation, a receive error or data loss may result. To
avoid this problem, check the status of the RCIDL bit to
make sure that the receive operation is Idle before
changing the system clock.
EXAMPLE 22-1:
Baud Rate % Error =
For a device with F
of 9600, Asynchronous mode, 8-bit BRG:
Solving for SPxBRGH:SPxBRGL:
ActualBaudRate
Desired Baud Rate
PIC16(L)F1526/27
SPxBRGH: SPxBRGL
Calc. Baud Rate Desired Baud Rate
------------------------------------------------------------------------------------------- -
=
OSC
=
=
=
=
=
-------------------------- -
64 25
16000000
CALCULATING BAUD
RATE ERROR
------------------------------------------------------------------------- -
64 [SPxBRGH:SPxBRG]
9615
----------------------------------
16000000
----------------------- -
----------------------- - 1
25.042
9615 9600
of 16 MHz, desired baud rate
9600
Desired Baud Rate
64
Baud Rate Formula
9600
+
–
F
F
=
1
F
OSC
OSC
OSC
--------------------------------------------- 1
=
-------------------------------------------- -
Desired Baud Rate
–
–
F
25
/[64 (n+1)]
/[16 (n+1)]
OS C
/[4 (n+1)]
DS41458A-page 267
=
F
OS C
64
0.16%
+
1
–
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