LPC1850FET256,551 NXP Semiconductors, LPC1850FET256,551 Datasheet - Page 54

• Manufacturer Part Number: LPC1850FET256,551
• Description: MCU 32BIT ARM CORTEX M3 256BGA
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1850FET256,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, QEI, SD/MMC, SPI, SSI, SSP, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 200K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Processor Series: LPC1850
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 200 KB
• Interface Type: SPI Flash (SPIFI), USB, Ethernet, LCD, External Memory Controller, I2C
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 6
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6682

NXP Semiconductors
10. Static characteristics
Table 8.
T
LPC1850_30_20_10
Objective data sheet
Symbol
Supply pins
V
V
V
V
I
I
I
I
DD(REG)(3V3)
BAT
DD(IO)
DD(ADC)
amb
DD(IO)
DD(REG)(3V3)
DDA(3V3)
BAT
=

40

Static characteristics
C to +85
Parameter
input/output supply
voltage
regulator supply voltage
(3.3 V)
analog supply voltage
(3.3 V)
battery supply voltage
regulator supply current
(3.3 V)
battery supply current
I/O supply current
ADC supply current

C, unless otherwise specified.
All information provided in this document is subject to legal disclaimers.
deep power-down mode;
deep sleep mode
deep sleep mode
Conditions
active mode; code
executed from <tbd>; all
peripherals disabled
sleep mode
deep sleep mode
power-down mode
deep power-down mode;
RTC not running
RTC running
power-down mode
deep power-down mode
power-down mode
deep power-down mode
CCLK = 12 MHz; PLL
disabled
CCLK = 100 MHz; PLL
enabled
CCLK = 150 MHz; PLL
enabled
V
V
present
DD(REG)(3V3)
DD(REG)(3V3)
whil?(1){}
Rev. 1.2 — 17 February 2011
present
not
[3][4]
[3][4]
[2]
[3]
[3]
[3]
[3]
[3]
[5]
[6]
[7]
[7]
[7]
[8]
[8]
[8]
32-bit ARM Cortex-M3 microcontroller
Min
2.2
2.2
2.0
2.2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LPC1850/30/20/10
Typ
-
-
-
-
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
[1]
© NXP B.V. 2011. All rights reserved.
Max
3.6
3.6
3.6
3.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
54 of 87
Unit
V
V
V
V
mA
mA
mA
mA
A
A
nA
nA
nA
nA
nA
nA
nA
nA
nA