STM32F205ZFT6 STMicroelectronics, STM32F205ZFT6 Datasheet - Page 65
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STM32F205ZFT6
Manufacturer Part Number
STM32F205ZFT6
Description
MCU ARM 768KB FLASH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F205RBT6.pdf
(163 pages)
Specifications of STM32F205ZFT6
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
114
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
132K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 24x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11165
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F205ZFT6
Manufacturer:
STMicroelectronics
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Company:
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STM32F205ZFT6
Manufacturer:
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STM32F205xx, STM32F207xx
Table 15.
1. Based on characterization, tested in production at V
2. External clock is 4 MHz and PLL is on when f
3. When the ADC is on (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.6 mA per ADC for
4. In this case HCLK = system clock/2.
I
DD
Symbol
the analog part.
Supply current
in Run mode
Typical and maximum current consumption
The MCU is placed under the following conditions:
●
●
●
●
●
Typical and maximum current consumption in Run mode, code with data processing
running from Flash memory (ART accelerator disabled)
Parameter
At startup, all I/O pins are configured as analog inputs by firmware.
All peripherals are disabled except if it is explicitly mentioned.
The
30 MHz, 1 wait state from 30 to 60 MHz, 2 wait states from 60 to 90 MHz and 3 wait
states from 90 to 120 MHz).
When the peripherals are enabled HCLK is the system clock, f
f
The maximum values are obtained for V
(T
PCLK2
A
), and the typical values for T
Flash
= f
External clock
peripherals enabled
External clock
peripherals disabled
HCLK
memory access time is adjusted to f
Conditions
/2, except is explicitly mentioned.
(2)
(3)
HCLK
, all
, all
Doc ID 15818 Rev 6
> 25 MHz.
(3)
DD
max and f
A
= 25 °C and V
16 MHz
16 MHz
120 MHz
120 MHz
90 MHz
60 MHz
30 MHz
25 MHz
90 MHz
60 MHz
30 MHz
25 MHz
8 MHz
4 MHz
2 MHz
8 MHz
4 MHz
2 MHz
f
HCLK
HCLK
DD
(4)
(4)
max with peripherals enabled.
= 3.6 V and maximum ambient temperature
HCLK
T
DD
A
= 25 °C T
Typ
= 3.3 V unless otherwise specified.
61
48
33
18
14
10
33
27
19
11
6
4
3
8
6
4
3
2
frequency (0 wait state from 0 to
A
Electrical characteristics
= 85 °C T
81
68
53
38
34
30
26
24
23
54
47
39
31
28
26
24
23
23
PCLK1
Max
= f
(1)
A
HCLK
= 105 °C
38
36
35
41
36
35
34
93
80
65
50
46
42
66
59
51
43
38
/4, and
65/163
Unit
mA