ICS950211BFLFT IDT, Integrated Device Technology Inc, ICS950211BFLFT Datasheet - Page 18

• Manufacturer Part Number: ICS950211BFLFT
• Description: IC TIMING CTRL HUB P4 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Timing Control Hubr

Specifications of ICS950211BFLFT

• Input: Crystal
• Output: Clock
• Frequency - Max: 205MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 205MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 950211BFLFT

PCI_STOP# - Assertion (transition from logic "1" to logic "0")
The impact of asserting the PCI_STOP# signal will be the following. All PCI[6:0] and stoppable PCI_F[2,0] clocks will latch low
in their next high to low transition. The PCI_STOP# setup time tsu is 10 ns, for transitions to be recognized by the next rising
edge.
CPU_STOP# - Assertion (transition from logic "1" to logic "0")
The impact of asserting the CPU_STOP# pin is all CPU outputs that are set in the I
assertion of CPU_STOP# are to be stopped after their next transition following the two CPU clock edge sampling as shown.
The final state of the stopped CPU signals is CPUT=High and CPUC=Low. There is to be no change to the output drive current
values. The CPUT will be driven high with a current value equal to (MULTSEL0) X (I REF), the CPUC signal will not be driven.
CPU_STOP# Functionality
0465E—05/17/05
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PCI_F[2:0] 33MHz
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CPU_STOP#
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PCI[6:0] 33MHz
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PCI_STOP#
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CPUC
CPUT
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Assertion of CPU_STOP# Waveforms
tsu
Assertion of PCI_STOP# Waveforms
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C configuration to be stoppable via
ICS950211