ICS9FG107AGLNT IDT, Integrated Device Technology Inc, ICS9FG107AGLNT Datasheet - Page 5

• Manufacturer Part Number: ICS9FG107AGLNT
• Description: IC FREQ TIMING GENERATOR 48TTSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS9FG107AGLNT

• Input: Clock, Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 9FG107AGLNT

IDT
ICS9FG107
Programmable FTG for Differential P4
TM
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address DC
• ICS clock will acknowledge
• Controller (host) sends the begining byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
/ICS
Byte N + X -1
(see Note 2)
W R
P
T
TM
Beginning Byte N
Data Byte Count = X
Index Block Write Operation
Slave Address DC
Beginning Byte = N
Byte N + X - 1
Controlle r (Host)
Programmable FTG for Differential P4
General SMBus serial interface information for the ICS9FG107
starT bit
stoP bit
W Rite
(H )
ICS (Sla ve /Re ce ive r)
TM
TM
CPU, PCI-Express & SATA Clocks
CPU, PCI-Express & SATA Clocks
ACK
ACK
ACK
ACK
ACK
(H)
5
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address DC
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address DD
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
W R
RD
RT
N
P
T
Slave Address DC
Slave Address DD
Index Block Read Operation
Beginning Byte = N
Controlle r (Host)
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
W Rite
ReaD
(H )
(H )
.
ICS9FG107
ICS (Sla ve /Re ce ive r)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
ACK
ACK
ACK
REV F 08/21/07
(H)
(H)
(H)