IDTCV128PVG8 IDT, Integrated Device Technology Inc, IDTCV128PVG8 Datasheet
IDTCV128PVG8
Specifications of IDTCV128PVG8
Related parts for IDTCV128PVG8
IDTCV128PVG8 Summary of contents
Page 1
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER FEATURES: • Compliant with Intel DB1200G rev. 0.5 • DIF Clock Support − 12differential clock output pairs @ 0.7 V − skew performance (same gear) • OE pin Control of All Outputs • ...
Page 2
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER PIN CONFIGURATION 1 HIGH_BW# 2 CLK_IN 3 CLK_IN# 4 SA_0 5 OE_0# 6 DIF_0 7 DIF_0# 8 OE_1# 9 DIF_1 1 0 DIF_1 DIF_2 1 ...
Page 3
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER PIN DESCRIPTION Pin Name Type CLK_IN, CLK_IN# IN DIF_[9:0] & DIF_[9:0]# OUT DIF & DIF# [11:10] OUT OE_[9:0 _10_11# IN HIGH_BW# IN SCL IN SDA I/O, OC IREF IN SA_[0:1] IN SA_2/PLL_BYPASS# IN ...
Page 4
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER GEAR RATIOS Select FSA SMBus3 ...
Page 5
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER TARGETED INPUT AND OUTPUT FREQUENCIES Input (MHz) Output (MHz) 200 200 267 133 160 320 333 167 N/A N/A 400 200 200 133 133 200 400 133 133 167 167 133 333 133 200 267 ...
Page 6
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER CONTROL REGISTERS BYTE 0 Bit Output(s) Affected 7 Group of 10 gear # DIF [9:0] Speed selection 6 Group of 2 gear # DIF [11:10] Speed selection 5 Reserved 4 FSA latched input 3 SMBus3 ...
Page 7
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER BYTE 4 Bit Output(s) Affected 7 Readback - FSA input 6 Readback - PLL_BW Readback-PLL_BYPASS# input 4 Reserved 3 Reserved 2 Readback - OE#_10-11 Input 1 Readback - OE#_9 Input 0 Readback - ...
Page 8
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER OUTPUT RELATIONAL TIMING PARAMETERS Group CLK_IN, DIF [x:0] Input to Output Skew in PLL mode (1:1 only) CLK_IN, DIF [x:0] Input to Output Skew in non PLL mode (1:1 only) DIF DIFF[x:0] Pin-to-Pin Skew (output ...
Page 9
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER DIF TIMING CHARACTERISTICS (NON SSC CLOCK INPUT) DIF 0 Timing Characteristics (Non-Spread Spectrum Mode) Symbol Parameter L Long Accuracy ACCURACY T Average Period PERIOD T Absolute Minimum Host CLK Period ABSMIN T Rise ...
Page 10
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER PWRDWN FUNCTIONALITY #/P DIF WRDWN 0 Normal 1 Float BUFFER POWER-UP STATE DIAGRAM S1 Delay >0. Power Off BUFFER POWER-UP STATE MACHINE DIF# State Normal State0 State1 ...
Page 11
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER ORDERING INFORMATION IDTCV XXX XX Device Type Package CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 X Grade Blank Commercial Temperature Range (0°C to +70°C) PA Thin Small Shrink Outline Package PAG ...
Page 12
IDTCV128 1-TO-12 DIFFERENTIAL CLOCK BUFFER Revision History Rev. Issue Date Description A 06/29/07 Release to Final. COMMERCIAL TEMPERATURE RANGE 12 Page # - ...