ICS9DB401BGLF IDT, Integrated Device Technology Inc, ICS9DB401BGLF Datasheet
ICS9DB401BGLF
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ICS9DB401BGLF Summary of contents
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Integrated Circuit Systems, Inc. Four Output Differential Buffer for PCI Express Recommended Application: DB800 Version 2.0 Yellow Cover part with PCI Express support with extended bypass mode frequency range. Output Features: • 0.7V current-mode differential output pairs • ...
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Integrated Circuit Systems, Inc. Pin Decription When OE_INV = 0 PIN # PIN NAME PIN TYPE 1 VDD PWR 2 SRC_IN IN 3 SRC_IN GND PWR 5 VDD PWR 6 DIF_1 OUT 7 DIF_1# OUT 8 OE_1 IN ...
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Integrated Circuit Systems, Inc. Pin Decription When OE_INV = 1 PIN # PIN NAME PIN TYPE 1 VDD PWR 2 SRC_IN IN 3 SRC_IN GND PWR 5 VDD PWR 6 DIF_1 OUT 7 DIF_1# OUT 8 OE1# IN ...
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Integrated Circuit Systems, Inc. General Description The ICS9DB401 follows the Intel DB400 Differential Buffer Specification v2.0. This buffer provides four PCI-Express SRC clocks. The ICS9DB401 is driven by a differential input pair from a CK409/CK410/CK410M main clock generator, such as ...
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Integrated Circuit Systems, Inc. Absolute Max Symbol Parameter VDD_A 3.3V Core Supply Voltage VDD_In 3.3V Logic Supply Voltage V Input Low Voltage IL V Input High Voltage IH Ts Storage Temperature Tambient Ambient Operating Temp Tcase Case Temperature Input ESD ...
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Integrated Circuit Systems, Inc. Electrical Characteristics - DIF 0.7V Current Mode Differential Pair 70° 3.3 V +/-5%; C =2pF PARAMETER SYMBOL Current Source Output Zo Impedance Voltage High VHigh Voltage ...
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Integrated Circuit Systems, Inc. Common Recommendations for Differential Routing L1 length, Route as non L2 length, Route as non L3 length, Route as non Rs Rt Down Device Differential Routing L4 length, Route as coupled differential trace. L4 length, Route ...
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Integrated Circuit Systems, Inc. General SMBus serial interface information for the ICS9DB401 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address DC • ICS clock will acknowledge • Controller (host) sends the ...
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Integrated Circuit Systems, Inc. SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (DC/DD) Byte 0 Pin # Name - PD_Mode Bit 7 - STOP_Mode Bit 6 - PD_SRC_INV Bit 5 Bit 4 - Reserved - Reserved Bit 3 Bit 2 - ...
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Integrated Circuit Systems, Inc. SMBus Table: Output Control Register Byte 3 Pin # Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SMBus Table: Vendor & Revision ID Register Byte 4 Pin ...
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Integrated Circuit Systems, Inc. PD# The PD# pin cleanly shuts off all clocks and places the device into a power saving mode. PD# must be asserted before shutting off the input clock or power to insure an orderly shutdown. PD ...
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Integrated Circuit Systems, Inc. Note: Polarities in timing diagrams are shown OE_INV = 0. They are similar to OE_INV = 1. SRC_STOP# The SRC_STOP# signal is an active-low asynchronous input that cleanly stops and starts the DIF outputs. A valid ...
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Integrated Circuit Systems, Inc. SRC_STOP_3 (SRC_Stop = Driven Tristate) SRC_Stop# PWRDWN# DIF (Free Running) DIF# (Free Running) DIF (Stoppable) DIF# (Stoppable) SRC_STOP_4 (SRC_Stop = Tristate Tristate) SRC_Stop# PWRDWN# DIF (Free Running) DIF# (Free Running) DIF (Stoppable) ...
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Integrated Circuit Systems, Inc INDEX INDEX AREA AREA Ordering Information ICS9DB401yFLFT Example: ICS XXXX 1014B—09/07/06 c SYMBOL ...
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Integrated Circuit Systems, Inc INDEX INDEX AREA AREA aaa Ordering Information ICS9DB401yGLFT Example: ICS XXXX 1014B—09/07/06 4.40 mm. Body, 0.65 mm. Pitch TSSOP ...
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Integrated Circuit Systems, Inc. Revision History Rev. Issue Date Description 0.1 4/21/2005 Changed Ordering Information from"LN" to "LF". 1. Updated LF Ordering Information to RoHS Compliant. A 8/15/2005 2. Release to web. B 9/7/2006 Updated Electrical Characteristics. 1014B—09/07/06 16 ICS9DB401 ...