ICS954309BKLFT IDT, Integrated Device Technology Inc, ICS954309BKLFT Datasheet - Page 6

• Manufacturer Part Number: ICS954309BKLFT
• Description: IC TIMING CTRL HUB P4 64-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Timing Control Hubr

Specifications of ICS954309BKLFT

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-VFQFN, 64-VFQFPN
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 954309BKLFT

Absolute Max
1044A—02/20/07
1
2
Tambient
Electrical Characteristics - Input/Supply/Common Output Parameters
T
Low-level Output Voltage
ppm frequency accuracy on PLL outputs.
ESD prot
Guaranteed by design and characterization, not 100% tested in production.
Symbol
Input frequency should be measured at the REFOUT pin and tuned to ideal 14.31818MHz to meet
VDD_A
VDD_In
A
Modulation Frequency
Clock/Data Rise Time
Tcase
Low Threshold Input-
Low Threshold Input-
Clock/Data Fall Time
Powerdown Current
Tdrive_CPU_STOP
Trise_CPU_STOP#
= 0 - 70°C; Supply Voltage V
Input High Voltage
Input High Current
Operating Current
Input Capacitance
Ts
Input Low Voltage
Input Low Current
Tfall_CPU_STOP
Current sinking at
Input Frequency
Clk Stabilization
Pin Inductance
SMBus Voltage
PARAMETER
SCLK/SDATA
SCLK/SDATA
High Voltage
Low Voltage
V
Tdrive_PD
Trise_PD
Tfall_PD
OL
= 0.4 V
Integrated
Circuit
Systems, Inc.
3.3V Logic Input Supply Voltage
3.3V Core Supply Voltage
Ambient Operating Temp
Storage Temperature
Input ESD protection
human body model
Case Temperature
Parameter
SYMBOL
I
I
I
V
V
DD3.3OP
DD3.3PD
T
C
PULLUP
T
T
C
V
V
L
C
V
V
I
I
IH_FS
IL_FS
STAB
I
RI2C
F
OUT
FI2C
IL1
IL2
IH
INX
pin
DD
OL
IH
IL
IN
i
DD
= 3.3 V +/-5%
V
All outputs driven, Full Active
all differential pairs tri-stated
V
assertion of PD to 1st clock
From VDD Power-Up or de-
IN
IN
CPU_STOP de-assertion
CPU output enable after
CPU output enable after
CPU_STOP rise time of
Output pin capacitance
CPU_STOP fall time of
= 0 V; Inputs with no pull-
Triangular Modulation
= 0 V; Inputs with pull-up
(Min VIH + 0.15) to
(Max VIL - 0.15) to
all diff pairs driven
(Min VIH + 0.15)
PD de-assertion
(Max VIL - 0.15)
PD rise time of
PD fall time of
CONDITIONS
GND - 0.5
X1 & X2 pins
Logic Inputs
3.3 V +/-5%
3.3 V +/-5%
up resistors
3.3 V +/-5%
3.3 V +/-5%
V
V
@ I
resistors
DD
2000
Min
-65
IN
0
= 3.3 V
= V
PULLUP
DD
V
V
DD
DD
Max
150
115
+ 0.5V
+ 0.5V
70
V
V
SS
SS
-200
MIN
0.7
2.7
30
-5
-5
6
2
- 0.3
- 0.3
4
Units
°C
°C
°
V
V
V
C
14.31818
32.540
TYP
V
V
DD
DD
1000
MAX
0.35
300
500
300
0.8
1.8
5.5
0.4
70
12
33
10
+ 0.3
5
+ 0.3
7
5
6
5
5
5
5
5
UNITS Notes
MHz
kHz
mA
mA
mA
mA
ms
uA
uA
uA
nH
pF
pF
pF
us
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
V
V
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
ICS954309