ICS9UMS9633BKILF IDT, Integrated Device Technology Inc, ICS9UMS9633BKILF Datasheet - Page 14

• Manufacturer Part Number: ICS9UMS9633BKILF
• Description: IC MOBILE PC CLK EMEBED 48VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PC Clockr

Specifications of ICS9UMS9633BKILF

• Input: Clock
• Output: Clock
• Frequency - Max: 167MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN
• Frequency-max: 167MHz
• Number Of Elements: 3
• Supply Current: 70mA
• Pll Input Freq (max): 15MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: VFQFPN EP
• Output Frequency Range: 67 to 167MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Industrial
• Pin Count: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 9UMS9633BKILF

IDT
ICS9UMS9633BI
ULTRA MOBILE PC CLOCK FOR INDUSTRIAL TEMPERATURE RANGE
Bit(s)
Bit(s)
Byte
Byte
TM
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
/ICS
TM
Ultra Mobile PC Clock for Industrial Temperature Range
Pin #
Pin #
2
3
Output Enable Register
Output Control Register
CPU0 Stop Enable
CPU1 Stop Enable
CPU2 Stop Enable
LCD100 Enable
CPU0 Enable
CPU1 Enable
CPU2 Enable
SRC0 Enable
SRC1 Enable
SRC2 Enable
DOT Enable
REF Enable
REF Slew
Name
Name
is free-running or stoppable. If it is set to stoppable
is free-running or stoppable. If it is set to stoppable
is free-running or stoppable. If it is set to stoppable
These bits control the edge rate of the REF clock.
This bit controls whether the CPU[0] output buffer
This bit controls whether the CPU[1] output buffer
This bit controls whether the CPU[2] output buffer
This bit controls whether the SRC[0] output buffer
This bit controls whether the SRC[1] output buffer
This bit controls whether the SRC[2] output buffer
This bit controls whether the CPU[0] output buffer
This bit controls whether the CPU[1] output buffer
This bit controls whether the CPU[2] output buffer
This bit controls whether the DOT output buffer is
This bit controls whether the REF output buffer is
This bit controls whether the LCD output buffer is
the CPU[0] output buffer will be disabled with the
the CPU[1] output buffer will be disabled with the
the CPU[2] output buffer will be disabled with the
assertion of CPU_STP#.
assertion of CPU_STP#.
assertion of CPU_STP#.
is enabled or not.
is enabled or not.
is enabled or not.
is enabled or not.
is enabled or not.
is enabled or not.
enabled or not.
enabled or not.
enabled or not.
Description
Description
14
Reserved
Reserved
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Free Running
Free Running
Free Running
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
01 = Medium Edge Rate
Advance Information
00 = Slow Edge Rate
10 = Fast Edge Rate
0
0
11 = Reserved
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
Stoppable
Stoppable
Stoppable
1
1
1451—01/20/09
Default
Default
10
1
1
1
1
1
1
1
1
0
0
1
0
0
0