ICS94211AFLF IDT, Integrated Device Technology Inc, ICS94211AFLF Datasheet - Page 10

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ICS94211AFLF

Manufacturer Part Number
ICS94211AFLF
Description
IC FREQ GENERATOR PROGR 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS94211AFLF

Input
Crystal
Output
Clock
Frequency - Max
332MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Frequency-max
332MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
94211AFLF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS94211AFLF-T
Manufacturer:
ICS
Quantity:
20 000
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
0441F—08/24/05
Absolute Maximum Ratings
T
Powerdown Current
1
Electrical Characteristics - Input/Supply/Common Output Parameters
Input Capacitance
ICS94211
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Guaranteed by design, not 100% tested in production.
Operating Supply
Clk Stabilization
A
Input Frequency
Transition time
Pin Inductance
PARAMETER
Settling time
= 0 - 70°C; Supply Voltage V
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Current
Skew
Delay
1
1
1
1
1
1
SYMBOL
tcpu-pci
t
t
I
I
I
PZH
PHZ
DD3.3OP
DD2.5OP
DD3.3PD
T
T
C
C
V
L
C
V
I
I
STAB
I
trans
T
F
IL1
IL2
OUT
INX
IH
pin
,t
,t
IH
IN
IL
s
i
PZL
PLZ
DD
V
V
V
C
CPU=66-133 MHz, SDRAM=100 MHz
CPU=133 MHz, SDRAM=133 MHz
C
C
V
Logic Inputs
Output pin capacitance
X1 & X2 pins
To 1st crossing of target frequency
From 1st crossing to 1% target frequency
From V
Output enable delay (all outputs)
Output disable delay (all outputs)
V
IN
IN
IN
L
L
L
DD
T
= 3.3 V +/-5%, V
= max cap loads;
= max cap loads;
= 0 pF; Input address to VDD or GND
= 1.5V; VTL=1.25V
= V
= 0 V; Inputs with no pull-up resistors
= 0 V; Inputs with pull-up resistors
= 3.3 V
DD
DD
= 3.3 V to 1% target frequency
CONDITIONS
DDL
= 2.5 V +/-5% (unless otherwise stated)
10
DD
+0.5 V
V
SS
MIN
-200
27
-5
-5
2
1
1
- 0.3
14.318
2.45
TYP
124
135
18
V
DD
MAX
350
500
600
0.8
70
45
10
10
4
+ 0.3
5
7
5
6
3
3
3
UNITS
MHz
mA
mA
mA
mA
ms
ms
ms
nH
ns
pF
pF
pF
ns
ns
V
V

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