W256H Cypress Semiconductor Corp, W256H Datasheet - Page 3

• Manufacturer Part Number: W256H
• Description: IC CLK BUFF 12OUT SDRAM 28SSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Buffer (Distribution)r

Specifications of W256H

• Number Of Circuits: 1
• Ratio - Input:output: 1:12
• Differential - Input:output: No/No
• Input: DDR, SDRAM
• Output: DDR, SDRAM
• Frequency - Max: 180MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Frequency-max: 180MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1399

Document #: 38-07256 Rev. *C
Serial Configuration Map
Table 1.
Byte 6: Outputs Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3 27, 26 DDR5T_SDRAM10,
Bit 2
Bit 1 23, 22 DDR4T_SDRAM8,
Bit 0
• The Serial bits will be read by the clock driver in the following
• Reserved and unused bits should be programmed to “0”.
• SMBus Address for the W256 is:
Bit
A6
order:
1
Byte 0 — Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 — Bits 7, 6, 5, 4, 3, 2, 1, 0
.–
.
Byte N — Bits 7, 6, 5, 4, 3, 2, 1, 0
Pin #
A5
–
–
–
1
–
–
1
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
FBOUT
DDR5C_SDRAM11
Reserved, drive to 0
DDR4C_SDRAM9
Reserved, drive to 0
A4
0
A3
1
Description
A2
0
A1
0
A0
1
Default
R/W
––
0
0
0
1
1
1
1
1
Byte 7: Outputs Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit
19, 18
12, 13
Pin #
7, 8
3, 4
–
–
–
–
Reserved, drive to 0
DDR3T_SDRAM6,
DDR3C_SDRAM7
DDR2T_SDRAM4,
DDR2C_SDRAM5
Reserved, drive to 0
Reserved, drive to 0
DDR1T_SDRAM2,
DDR1C_SDRAM3
Reserved, drive to 0
DDR0T_SDRAM0,
DDR0C_SDRAM1
Description
Page 3 of 9
W256
Default
1
1
1
1
1
1
1
1