ICS85314BGI-01LF IDT, Integrated Device Technology Inc, ICS85314BGI-01LF Datasheet - Page 10
![IC FANOUT BUFFER LVPECL 20-TSSOP](/photos/6/51/65132/ics85314bgi-01lf_sml.jpg)
ICS85314BGI-01LF
Manufacturer Part Number
ICS85314BGI-01LF
Description
IC FANOUT BUFFER LVPECL 20-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Fanout Buffer (Distribution), Multiplexerr
Series
HiPerClockS™r
Datasheet
1.ICS85314BGI-01LF.pdf
(20 pages)
Specifications of ICS85314BGI-01LF
Number Of Circuits
1
Ratio - Input:output
2:5
Differential - Input:output
Yes/Yes
Input
HCSL, LVCMOS, LVDS, LVHSTL, LVPECL, LVTTL, SSTL
Output
LVPECL
Frequency - Max
700MHz
Voltage - Supply
2.375 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
700MHz
Number Of Clock Inputs
2
Output Frequency
700MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.8V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1167
800-1167-5
800-1167
85314BGI-01LF
800-1167-5
800-1167
85314BGI-01LF
F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
interface examples for the CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here
F
F
85314BGI-01
IGURE
PP
IGURE
IGURE
IFFERENTIAL
3.3V
and V
R5,R6 locate near the driver pin.
3.3V
LVPECL
3C. CLK/
3A. CLK/
3E. CLK/
1.8V
LVPECL
CMR
R5
100 - 200
3.3V LVPECL D
3.3V LVPECL D
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
LVHSTL D
input requirements. Figures 3A to 3E show
C
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
R6
100 - 200
N
N
N
Zo = 50 Ohm
Zo = 50 Ohm
CLK I
CLK I
CLK I
Zo = 50 Ohm
Zo = 50 Ohm
I
RIVER
NPUT
NPUT
NPUT
NPUT
RIVER WITH
RIVER
D
R1
50
D
C1
C2
D
3.3V
R3
125
I
NTERFACE
RIVEN BY
RIVEN BY
R1
84
RIVEN BY
SWING
3.3V
R3
125
R2
50
R4
125
R1
84
R2
84
and V
R4
125
CLK
nCLK
AC C
R2
84
CLK
nCLK
3.3V
OH
3.3V
HiPerClockS
Input
must meet the
D
OUPLE
HiPerClockS
Input
CLK
nCLK
IFFERENTIAL
3.3V
HiPerClockS
Input
www.idt.com
10
F
are examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 3A, the input termination applies for LVHSTL
drivers. If you are using an LVHSTL driver from another
vendor, use their termination recommendation.
F
IGURE
IGURE
-
TO
3.3V
3.3V
-2.5V/3.3V LVPECL F
3D. CLK/
3B. CLK/
LVDS_Driv er
LVPECL
3.3V LVDS D
3.3V LVPECL D
Zo = 50 Ohm
Zo = 50 Ohm
N
N
CLK I
CLK I
Zo = 50 Ohm
Zo = 50 Ohm
NPUT
NPUT
RIVER
R1
50
RIVER
D
D
R3
50
ICS85314I-01
RIVEN BY
RIVEN BY
L
R2
50
OW
R1
100
CLK
nCLK
ANOUT
3.3V
S
HiPerClockS
KEW
Input
CLK
nCLK
REV. F JULY 25, 2010
3.3V
, 1-
B
Receiv er
UFFER
TO
-5