ICS85356AGILF IDT, Integrated Device Technology Inc, ICS85356AGILF Datasheet - Page 2

• Manufacturer Part Number: ICS85356AGILF
• Description: IC CLK MUX 2:1 DIFF HS 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Multiplexerr

Specifications of ICS85356AGILF

• Number Of Circuits: 2
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 900MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 900MHz
• Number Of Clock Inputs: 4/2
• Mode Of Operation: Differential
• Output Frequency: 900MHz
• Output Logic Level: ECL/LVPECL
• Operating Supply Voltage (min): -3/3V
• Operating Supply Voltage (typ): -3.3/3.3V
• Operating Supply Voltage (max): -3.8/3.6V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1175; 800-1175-5; 800-1175; 85356AGILF

ICS85356I Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Tables
Table 3. Control Input Function Table
ICS85356AMI REVISION B MAY 10, 2010
Symbol
C
R
R
IN
PULLUP
PULLDOWN
Number
COM_SEL
14, 20
12, 13
15, 17
18, 19
3, 8
10
11
16
1
2
4
5
6
7
9
0
0
0
0
1
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
SEL1, SEL0
COM_SEL
nCLK0A
nCLK0B
nCLK1A
nCLK1B
nQ1,Q1
nQ0,Q0
CLK0A
CLK0B
CLK1A
CLK1B
Name
V
V
nc
CC
EE
SEL1
0
0
1
1
x
Inputs
Unused
Output
Output
Power
Power
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
SEL0
Type
0
1
0
1
x
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
Pullup
Pullup
Pullup
Pullup
Pullup
Test Conditions
Description
Positive supply pins.
Non-inverting differential clock input.
Inverting differential clock input.
No connect.
Non-inverting differential clock input.
Inverting differential clock input.
Non-inverting differential clock input.
Inverting differential clock input.
Non-inverting differential clock input.
Inverting differential clock input.
Negative supply pin.
Differential output pair. LVPECL interface levels.
Clock select inputs. LVCMOS/LVTTL interface levels.
Common select input. LVCMOS/LVTTL interface levels.
Differential output pair. LVPECL interface levels.
CLK0A
CLK0B
CLK0A
CLK0B
CLK0B
Q0
2
2:1, DIFFERENTIAL-TO-3.3V LVPECL/ECL CLOCK MULTIPLEXER
nCLK0A
nCLK0B
nCLK0A
nCLK0B
nCLK0B
Minimum
nQ0
Outputs
Typical
51
51
©2010 Integrated Device Technology, Inc.
4
CLK1A
CLK1A
CLK1B
CLK1B
CLK1B
Q1
Maximum
nCLK1A
nCLK1A
nCLK1B
nCLK1B
nCLK1B
nQ1
Units
k
k
pF
Ω
Ω