ICS85102AGILF IDT, Integrated Device Technology Inc, ICS85102AGILF Datasheet
ICS85102AGILF
Specifications of ICS85102AGILF
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85102AGILF
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ICS85102AGILF Summary of contents
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LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS- TO-0.7V HCSL FANOUT BUFFER G D ENERAL ESCRIPTION The ICS85102I is a low skew, high performance to-2 Differential-to-HCSL fanout buffer and a mem- HiPerClockS™ ber of the HiPerClockS™ family of High Perfor- mance ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER ABLE IN ESCRIPTIONS ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER T 3A ABLE ONTROL NPUT UNCTION ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs Continuous Current 50mA Surge Current 100mA Package Thermal Impedance, JA Storage Temperature, T ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER 3.3V ± 10%, T ABLE HARACTERISTICS ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER P ARAMETER 3.3V±10 HCSL 50 GND 475 IREF 0V This load condition is used for sk(o and t jit measurements HCSL O ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER P ARAMETER Clock Period (Differential) Positive Duty Cycle (Differential) 0. IFFERENTIAL EASUREMENT OINTS FOR T STABLE V RB +150mV V = +100mV RB 0. ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER ECOMMENDATIONS FOR NUSED I : NPUTS CLK I NPUT For applications not requiring the use of a clock input, it can be left floating. Though not required, but for ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING input requirements. Figures show interface ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER R T ECOMMENDED ERMINATION Figure 4A is the recommended termination for applications which require the receiver and driver separate PCB. All traces should be 50 impedance. Figure 4B ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER This section provides information on power dissipation and junction temperature for the ICS85102I. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS85102I is the ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER 3. Calculations and Equations. The purpose of this section is to calculate power dissipation on the IC per HCSL output pair. HCSL output driver circuit and termination are shown in Figure 5. ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS85102I is: 614 P P ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER ABLE RDERING NFORMATION ...
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ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications ...