ICS889474AKLF IDT, Integrated Device Technology Inc, ICS889474AKLF Datasheet
ICS889474AKLF
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ICS889474AKLF Summary of contents
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LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION G D ENERAL ESCRIPTION The ICS889474 is a high speed 2-to-1 differential IC S multiplexer with integrated 2 output LVDS fanout HiPerClockS™ buffer and internal termination and is a member of ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION ABLE IN ESCRIPTIONS ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Outputs, I (LVDS) O Continuous Current Surge Current Input Current, INx, nINx V Current ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION T 4D. LVDS DC C ABLE HARACTERISTICS ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION P ARAMETER V DD 2.5V±5% POWER SUPPLY LVDS + Float GND – UTPUT OAD EST IRCUIT nQx PART 1 Qx nQy PART 2 Qy tsk(pp) ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION OUT 400mV (typical & INGLE NDED IFFERENTIAL NPUT V DD LVDS DC Input IFFERENTIAL UTPUT OLTAGE ETUP ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION 50Ω Ω Ω Ω Ω T LVPECL NPUT WITH UILT N The IN /nIN with built-in 50Ω ter minations accepts LVDS, LVPECL, CML and other differential signals. ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION R U ECOMMENDATIONS FOR NUSED I : NPUTS IN/nIN I NPUTS For applications not requiring the use of the differential input, both IN and nIN can be left floating. Though ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION VFQFN EPAD T R HERMAL ELEASE In order to maximize both the removal of heat from the package and the electrical performance, a land patter n must be incorporated on ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION This section provides information on power dissipation and junction temperature for the ICS889474. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS889474 ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION θ ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS889474 is: ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION ACKAGE UTLINE UFFIX FOR NOTE: The following package mechanical drawing is a generic drawing that applies to any pin count VFQFN package. This ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION ABLE RDERING NFORMATION ...
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ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA ...