ICS83940BYLF IDT, Integrated Device Technology Inc, ICS83940BYLF Datasheet - Page 8

IC FANOUT BUFFER 1:18 32-LQFP

ICS83940BYLF

Manufacturer Part Number
ICS83940BYLF
Description
IC FANOUT BUFFER 1:18 32-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Fanout Buffer (Distribution), Multiplexerr
Series
HiPerClockS™r
Datasheet

Specifications of ICS83940BYLF

Number Of Circuits
1
Ratio - Input:output
2:18
Differential - Input:output
Yes/No
Input
CML, LVCMOS, LVPECL, LVTTL, SSTL
Output
LVCMOS, LVTTL
Frequency - Max
250MHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Frequency-max
250MHz
Number Of Clock Inputs
2
Output Frequency
250MHz
Output Logic Level
LVCMOS/LVTTL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Package Type
LQFP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
83940BYLF

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS83940BYLF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS83940BYLF
Manufacturer:
ICS
Quantity:
20 000
Part Number:
ICS83940BYLFT
Manufacturer:
IDT
Quantity:
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Part Number:
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Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
LVPECL C
The PCLK /nPCLK accepts LVPECL, CML, SSTL and other
differential signals. Both V
and V
examples for the PCLK/nPCLK input driven by the most
common driver types. The input interfaces suggested here
F
F
F
83940BY
IGURE
IGURE
IGURE
3.3V
CMR
3.3V LVPECL
2A. PCLK/
2C.
2E. PCLK/
3.3V
3.3V
input requirements. Figures 2A to 2E show interface
R5
100 - 200
LVPECL
CML
BY A
BY A
PCLK/
BY A
LOCK
R6
100 - 200
CML D
3.3V LVPECL D
3.3V LVPECL D
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
N
N
I
Zo = 50 Ohm
Zo = 50 Ohm
N
PCLK I
NPUT
PCLK I
PCLK I
RIVER
SWING
I
NTERFACE
NPUT
NPUT
NPUT
C1
C2
3.3V
R1
50
and V
3.3V
R3
125
R1
84
D
D
3.3V
R3
84
D
R1
125
RIVEN
RIVEN
R2
50
RIVER WITH
RIVEN
RIVER
R4
125
OH
R4
84
R2
84
PCLK
nPCLK
R2
125
must meet the V
3.3V
PCLK
nPCLK
HiPerClockS
PCLK/nPCLK
3.3V
PCLK
nPCLK
AC C
3.3V
Input
HiPerClockS
HiPerClockS
PCLK/nPCLK
OUPLE
www.idt.com
LVPECL-
PP
8
are examples only. If the driver is from another vendor, use
their termination recommendation. Please consult with the
vendor of the driver component to confirm the driver
termination requirements.
F
F
IGURE
IGURE
3.3V
TO
2B. PCLK/
2D. PCLK/
LVDS
2.5V
-LVCMOS/LVTTL F
SSTL
BY AN
BY A
Zo = 50 Ohm
Zo = 50 Ohm
3.3V LVDS D
SSTL D
Zo = 60 Ohm
Zo = 60 Ohm
N
N
PCLK I
PCLK I
R5
100
RIVER
NPUT
NPUT
2.5V
R3
120
L
R1
120
C1
C2
RIVER
OW
D
D
R4
120
RIVEN
RIVEN
R2
120
3.3V
R3
1K
R1
1K
S
ICS83940
ANOUT
REV. A NOVEMBER 17, 2010
PCLK
nPCLK
KEW
R4
1K
R2
1K
3.3V
PCLK
nPCLK
HiPerClockS
PCLK/nPCLK
, 1-
3.3V
B
HiPerClockS
PCL K/n PC LK
TO
UFFER
-18

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