ICS8543BGI IDT, Integrated Device Technology Inc, ICS8543BGI Datasheet - Page 12

• Manufacturer Part Number: ICS8543BGI
• Description: IC CLK FAN BUFF MUX 1:4 20TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Multiplexerr
• Series: HiPerClockS™r

Specifications of ICS8543BGI

• Number Of Circuits: 1
• Ratio - Input:output: 1:4
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVDS
• Frequency - Max: 650MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 650MHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 650MHz
• Output Logic Level: LVDS
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 8543BGI

LVPECL Clock Input Interface
The PCLK /nPCLK accepts LVPECL, CML, SSTL and other
differential signals. Both signals must meet the V
requirements. Figures 4A to 4F show interface examples for the
HiPerClockS PCLK/nPCLK input driven by the most common
Figure 4A. HiPerClockS PCLK/nPCLK Input
Figure 4C. HiPerClockS PCLK/nPCLK Input
Figure 4E. HiPerClockS PCLK/nPCLK Input
IDT™ / ICS™ LVDS FANOUT BUFFER
ICS8543I
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
2.5V
3.3V
3.3V
LVPECL
SSTL
CML
Driven by a CML Driver
Driven by a 3.3V LVPECL Driver
Driven by an SSTL Driver
Zo = 60Ω
Zo = 60Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
R3
120
2.5V
R3
125
3.3V
R1
120
R1
84
R1
50
3.3V
R4
120
R4
125
R2
120
R2
84
R2
50
PP
PCLK
nPCLK
PCLK
nPCLK
PCLK
nPCLK
and V
3.3V
3.3V
3.3V
HiPerClockS
Input
HiPerClockS
PCLK/nPCLK
HiPerClockS
PCLK/nPCLK
CMR
input
12
driver types. The input interfaces suggested here are examples
only. If the driver is from another vendor, use their termination
recommendation. Please consult with the vendor of the driver
component to confirm the driver termination requirements.
Figure 4B. HiPerClockS PCLK/nPCLK Input
Figure 4D. HiPerClockS PCLK/nPCLK Input Driven by
Figure 4F. HiPerClockS PCLK/nPCLK Input Driven by
3.3V
3.3V
3.3V LVPECL
3.3V
LVDS
CML Built-In Pullup
R5
100 - 200
Driven by a Built-In Pullup CML Driver
a 3.3V LVPECL Driver with AC Couple
a 3.3V LVDS Driver
R6
100 - 200
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
ICS8543BGI REV. E SEPTEMBER 9, 2008
Zo = 50Ω
Zo = 50Ω
C1
C2
R3
84
3.3V
R1
100
R1
125
R1
100
R4
84
R2
125
PCLK
nPCLK
PCLK
nPCLK
3.3V
HiPerClockS
3.3V
PCLK
nPCLK
HiPerClockS
PCLK/nPCLK
3.3V
HiPerClockS
PCLK/nPCLK