ICS85454AK-01LF IDT, Integrated Device Technology Inc, ICS85454AK-01LF Datasheet

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ICS85454AK-01LF

Manufacturer Part Number
ICS85454AK-01LF
Description
IC MUX DUAL 2:1/1:2 16-VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of ICS85454AK-01LF

Number Of Circuits
2
Ratio - Input:output
2:1, 1:2
Differential - Input:output
No/No
Input
CML, LVDS, LVPECL
Output
LVDS
Frequency - Max
2.5GHz
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-VFQFN
Frequency-max
2.5GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
85454AK-01LF
B
G
switches one input to both of two outputs. This device
may be useful for multiplexing multi-rate Ethernet PHYs
which have 100Mbit and 1000Mbit transmit/receive
pairs onto an optical SFP module which has a single
transmit/receive pair. Another mode allows loop back
testing and allows the output of a PHY transmit pair to be
routed to the PHY input pair. For examples, please refer to
the Application Information section of the data sheet.
The ICS85454-01 is optimized for applications requiring
very high performance and has a maximum operating
frequency in 2.5GHz. The device is packaged in a small,
3mm x 3mm VFQFN package, making it ideal for use on
space-constrained boards.
nINB
85454AK-01
nQB
HiPerClockS™
INB
IC S
QB
LOCK
ENERAL
D
The ICS85454-01 is a 2:1/1:2 Multiplexer and
a member of the HiPerClockS
performance clock solutions from ICS. The 2:1
Multiplexer allows one of 2 inputs to be select-
ed onto one output pin and the 1:2 MUX
IAGRAM
Integrated
Circuit
Systems, Inc.
D
ESCRIPTION
SELA
0
1
www.icst.com/products/hiperclocks.html
TM
family of high
SELB
0
1
1
F
Dual 2:1/1:2 MUX
Three LVDS outputs
Three differential inputs
Differential inputs can accept the following differential
levels: LVPECL, LVDS, CML
Loopback test mode available
Maximum output frequency: 2.5GHz
Part-to-part skew: 250ps (maximum)
Additive phase jitter, RMS: 0.05ps (typical)
Propagation delay: 550ps (maximum)
2.5V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS compliant
packages
EATURES
D
IFFERENTIAL
LOOP0
LOOP1
INA0
nINA0
QA0
nQA0
INA1
nINA1
QA1
nQA1
-
P
3mm x 3mm x 0.95 package body
TO
nQA0
nQA1
IN
QA0
QA1
-LVDS M
ICS85454-01
A
ICS85454-01
16-Lead VFQFN
1
2
3
4
SSIGNMENT
16 15 14 13
5
K Package
Top View
D
6
REV. B OCTOBER 28, 2008
UAL
7
ULTIPLEXER
8
12
11
10
2:1/1:2
9
INA0
nINA0
INA1
nINA1

Related parts for ICS85454AK-01LF

ICS85454AK-01LF Summary of contents

Page 1

Integrated Circuit Systems, Inc ENERAL ESCRIPTION The ICS85454- 2:1/1:2 Multiplexer and member of the HiPerClockS HiPerClockS™ performance clock solutions from ICS. The 2:1 Multiplexer allows one of 2 inputs to be select- ed ...

Page 2

Integrated Circuit Systems, Inc ABLE IN ESCRIPTIONS ...

Page 3

Integrated Circuit Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage, V 4.6V DD Inputs, V -0. Outputs Continuous Current 10mA Surge Current 15mA Operating Temperature Range, TA -40°C to +85°C Storage Temperature, T ...

Page 4

Integrated Circuit Systems, Inc. T 4D. LVDS DC C ABLE HARACTERISTICS ...

Page 5

Integrated Circuit Systems, Inc. The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot ...

Page 6

Integrated Circuit Systems, Inc. P ARAMETER 2.5V±5% POWER SUPPLY LVDS + - Float GND UTPUT OAD EST IRCUIT nQx PART 1 Qx nQy PART sk(pp ART TO ART ...

Page 7

Integrated Circuit Systems, Inc IRING THE IFFERENTIAL NPUT TO Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V generated by the bias resistors R1, R2 ...

Page 8

Integrated Circuit Systems, Inc IFFERENTIAL LOCK NPUT NTERFACE The IN/nIN accepts LVPECL, CML, SSTL and other differen- tial signals. Both V and V must meet the V SWING OH input requirements. Figures show ...

Page 9

Integrated Circuit Systems, Inc YPICAL PPLICATION IAGRAM FOR E C AND XTERNAL ONNECTORS Host Adapter Board SerDes Protocol Controller PCI Bus 85454AK-01 D IFFERENTIAL OST US DAPTER OARDS FOR INB nINB 0 QB ...

Page 10

Integrated Circuit Systems, Inc YPICAL PPLICATION IAGRAM FOR INB TX nINB SerDes QB nQB RX Linecard 2.5V LVDS D T RIVER ERMINATION Figure 3 shows a typical termination for LVDS driver in characteristic impedance of 100 differential ...

Page 11

Integrated Circuit Systems, Inc. This section provides information on power dissipation and junction temperature for the ICS85454-01. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS85454-01 is the sum of the core ...

Page 12

Integrated Circuit Systems, Inc ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS85454-01 is: 171 85454AK- ...

Page 13

Integrated Circuit Systems, Inc ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MO-220 85454AK-01 D IFFERENTIAL VFQFN EAD ACKAGE IMENSIONS ...

Page 14

Integrated Circuit Systems, Inc ABLE RDERING NFORMATION ...

Page 15

Integrated Circuit Systems, Inc ...

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