ICS889875AKLFT IDT, Integrated Device Technology Inc, ICS889875AKLFT Datasheet - Page 3

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ICS889875AKLFT

Manufacturer Part Number
ICS889875AKLFT
Description
IC BUFFER/DIVIDER LVDS 16-VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution), Divider, Multiplexerr
Datasheet

Specifications of ICS889875AKLFT

Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/Yes
Input
CML, LVDS, LVPECL
Output
LVDS
Frequency - Max
2GHz
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-VFQFN
Frequency-max
2GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
889875AKLFT
Function Tables
Table 3A. Control Input Function Table
NOTE: After nRESET switches, the clock outputs are disabled or
enabled following a falling input clock edge as shown in Figure 1.
Figure 1. nRESET Timing Diagram
Table 3B. Truth Table
NOTE 1: Reset/disable function is asserted on the next clock input (IN/nIN) high-to-low transition.
IDT™ / ICS™ LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION
nRESET
nRESET/nDISABLE
ICS889875
DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION
nRESET
nQx
nIN
Input
Qx
IN
0 (NOTE 1)
0
1
V
IN
Swing
1
1
1
1
1
Disabled; LOW
Enabled
Q0, Q1
Inputs
S2
X
0
1
1
1
1
Outputs
t
RR
S1
V
X
X
0
0
1
1
DD
Disabled; HIGH
/2
nQ0, nQ1
Enabled
S0
X
X
0
1
0
1
Outputs
Reference Clock (pass through)
Reference Clock ÷2
Reference Clock ÷4
Reference Clock ÷8
Reference Clock ÷16
Q0/nQ0, Q1/nQ1
Qx = LOW, nQx = HIGH; Clock disabled
3
t
PD
V
OUT
Swing
ICS889875AK REV. B OCTOBER 27, 2008

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