MK2703BSLF IDT, Integrated Device Technology Inc, MK2703BSLF Datasheet - Page 2

• Manufacturer Part Number: MK2703BSLF
• Description: IC CLOCK SYNTH PLL AUDIO 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Synthesizerr

Specifications of MK2703BSLF

• Pll: Yes with Bypass
• Input: Clock, Crystal
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 27MHz
• Divider/multiplier: No/No
• Voltage - Supply: 3.13 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 27MHz
• Number Of Elements: 1
• Pll Input Freq (min): 27MHz
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: SOIC N
• Output Frequency Range: 8.192 to 24.576MHz
• Operating Supply Voltage (min): 3.13V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1786; 800-1786-5; 800-1786

Pin Assignment
Pin Descriptions
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
MK2703B must be isolated from system power supply noise
to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the MK2703B to minimize lead
inductance. No external power supply filtering is required for
the MK2703B.
IDT™ / ICS™ PLL AUDIO CLOCK SYNTHESIZER
MK2703B
PLL AUDIO CLOCK SYNTHESIZER
Number
Pin
GND
VDD
27M
1
2
3
4
5
6
7
8
X1
8-pin (150 mil) SOIC
Name
1
2
3
4
GND
VDD
27M
CLK
Pin
X1
S1
S0
X2
Output
Output
Power
Power
Type
Input
Input
Pin
XO
XI
8
7
6
5
Crystal Connection. Connect to a 27 MHz fundamental crystal or clock.
Connect to +3.3 V or +5 V.
Connect to ground.
27 MHz buffered reference clock output.
Audio clock output per table above.
Audio clock frequency select input #1. Determines CLK output per table
above. Internal pull-up resistor.
Audio clock frequency select input #0. Determines CLK output per table
above. Internal pull-up resistor.
Crystal connection to a 27 MHz crystal, or leave unconnected for clock
output.
X2
S0
S1
CLK
2
A
Series Termination Resistor
A 33Ω terminating resistor can be used next to the clock
outputs for trace lengths over one inch.
Crystal Load Capacitors
The total on-chip capacitance is approximately 16 pF. A
parallel resonant, fundamental mode, AT cut 27 MHz crystal
should be used. The device crystal connections should
include pads for small capacitors from X1 to ground and
from X2 to ground. These capacitors are used to adjust the
UDIO
Pin Description
Key: 0 = Connect pin directly to ground
S1
C
0
0
1
1
1 = Connect pin directly to VDD
LOCK
S0
0
1
0
1
O
UTPUT
S
CLK (MHz)
ELECT
MK2703B
CLOCK SYNTHESIZER
11.2896
12.288
24.576
8.192
T
ABLE
REV D 042606