74HCT7046AD,112 NXP Semiconductors, 74HCT7046AD,112 Datasheet
74HCT7046AD,112
Specifications of 74HCT7046AD,112
74HCT7046AD
933827490112
Related parts for 74HCT7046AD,112
74HCT7046AD,112 Summary of contents
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DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT7046A Phase-locked-loop with lock detector Product specification File under Integrated Circuits, IC06 ...
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Philips Semiconductors Phase-locked-loop with lock detector FEATURES Low power consumption Centre frequency MHz (typ 4 Choice of two phase comparators: EXCLUSIVE-OR; edge-triggered JK flip-flop; Excellent VCO frequency linearity VCO-inhibit control for ON/OFF ...
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Philips Semiconductors Phase-locked-loop with lock detector waveforms for the PC1 loop locked at f are shown in Fig.7. o The frequency capture range ( defined as the frequency range of input signals on which the PLL will ...
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Philips Semiconductors Phase-locked-loop with lock detector QUICK REFERENCE DATA GND = amb SYMBOL PARAMETER f VCO centre frequency o C input capacitance (pin power dissipation capacitance per package PD Notes 1. ...
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Philips Semiconductors Phase-locked-loop with lock detector PIN DESCRIPTION PIN NO. SYMBOL PC1 OUT 3 COMP IN 4 VCO OUT 5 INH GND 9 VCO IN 10 DEM OUT 11 R ...
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Philips Semiconductors Phase-locked-loop with lock detector December 1990 74HC/HCT7046A 6 Product specification ...
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Philips Semiconductors Phase-locked-loop with lock detector Fig.6 Phase comparator 1: average output voltage versus input phase difference ---------- - DEMOUT PC1OUT = – DEMOUT SIGIN COMPIN December 1990 Fig.5 Logic diagram. – SIGIN COMPIN ...
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Philips Semiconductors Phase-locked-loop with lock detector Fig.8 Phase comparator 2: average output voltage versus input phase difference ---------- - = DEMOUT PC2OUT 4 – ˙ = DEMOUT SIGIN COMPIN December 1990 – SIGIN COMPIN Fig.9 ...
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Philips Semiconductors Phase-locked-loop with lock detector RECOMMENDED OPERATING CONDITIONS FOR 74HC/HCT SYMBOL PARAMETER V DC supply voltage supply voltage if VCO section is CC not used V DC input voltage range output voltage range ...
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Philips Semiconductors Phase-locked-loop with lock detector DC CHARACTERISTICS FOR 74HC Quiescent supply current Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER I quiescent supply CC current (VCO disabled) December 1990 amb 74HC 25 40 ...
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Philips Semiconductors Phase-locked-loop with lock detector Phase comparator section Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER DC coupled HIGH V level input voltage IH SIG , COMP coupled LOW level V input voltage ...
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Philips Semiconductors Phase-locked-loop with lock detector VCO section Voltages are referenced to GND (ground = 0 V) SYM- PARAMETER BOL min. HIGH level 2.1 V input voltage 3.15 IH INH 4.2 LOW level V input voltage IL INH level 2.9 ...
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Philips Semiconductors Phase-locked-loop with lock detector Demodulator section Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER R resistor range S V offset voltage OFF VCO DEMOUT R dynamic output D resistance at DEM OUT ...
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Philips Semiconductors Phase-locked-loop with lock detector AC CHARACTERISTICS FOR 74HC Phase comparator section GND = ns SYMBOL PARAMETER propagation delay PHL PLH SIG ...
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Philips Semiconductors Phase-locked-loop with lock detector DC CHARACTERISTICS FOR 74HCT Quiescent supply current Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER I quiescent supply current CC (VCO disabled) I additional quiescent CC supply current per input pin ...
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Philips Semiconductors Phase-locked-loop with lock detector Phase comparator section Voltages are referenced to GND (ground = 0 V) SYM PARAMETER BOL DC coupled V HIGH level input voltage IH SIG , COMP coupled V LOW level input ...
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Philips Semiconductors Phase-locked-loop with lock detector DC CHARACTERISTICS FOR 74HCT VCO section Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER min. typ. max. min. max. min. V HIGH level input 2.0 IH voltage INH V LOW level ...
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Philips Semiconductors Phase-locked-loop with lock detector Demodulator section Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER R resistor range S V offset voltage OFF VCO DEMOUT R dynamic output D resistance at DEM OUT ...
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Philips Semiconductors Phase-locked-loop with lock detector VCO section GND = ns SYMBOL PARAMETER f/T frequency stability with temperature change f VCO centre frequency o (duty factor ...
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Philips Semiconductors Phase-locked-loop with lock detector FIGURE REFERENCES FOR DC CHARACTERISTICS Fig.10 Typical input resistance curve at SIG COMP . IN Fig.12 Input current at SIG , COMP 0 self-bias point. I December 1990 Fig.11 ...
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Philips Semiconductors Phase-locked-loop with lock detector AC WAVEFORMS ( 50 GND Fig.14 Waveforms showing input (SIG transition times GND to ...
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MSB710 25 handbook, halfpage f (%) 4 100 150 o T ...
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Philips Semiconductors Phase-locked-loop with lock detector AC WAVEFORMS To obtain optimum temperature stability, C December 1990 must be a small as possible, but larger than 100 pF. 1 Fig.16 Continued. 23 Product specification 74HC/HCT7046A ...
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Philips Semiconductors Phase-locked-loop with lock detector Fig.17 Graphs showing VCO frequency (f December 1990 ) as a function of the VCO input voltage (V VCO 24 Product specification 74HC/HCT7046A ). VCOIN ...
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Philips Semiconductors Phase-locked-loop with lock detector Fig.18 Definition of VCO frequency linearity 0.5 V over the V CC for VCO linearity -------------- - – linearity ...
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Philips Semiconductors Phase-locked-loop with lock detector ____ Fig.20 Power dissipation versus the value VCOIN ...
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Philips Semiconductors Phase-locked-loop with lock detector APPLICATION INFORMATION This information is a guide for the approximation of values of external components to be used with the 74HC/HCT7046 in a phase-lock-loop system. References should be made to Figs 27, 28 and ...
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Philips Semiconductors Phase-locked-loop with lock detector PHASE SUBJECT COMPARATOR VCO frequency PC1, PC2 with extra offset PC1, PC2 December 1990 DESIGN CONSIDERATIONS VCO frequency characteristic With R1 and R2 within the ranges 3 k the characteristics of the VCO operation ...
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Philips Semiconductors Phase-locked-loop with lock detector PHASE SUBJECT COMPARATOR PLL conditions PC1 with no signal at PC2 the SIG input IN PLL frequency PC1, PC2 capture range PLL locks on PC1 harmonics at PC2 centre frequency noise rejection at PC1 ...
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Philips Semiconductors Phase-locked-loop with lock detector (1) To obtain optimum VCO performance, C1 must be as small as possible but larger than 100 pF. (2) Interpolation for various values of R1 can be easily calculated because a constant R1C1 product ...
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Philips Semiconductors Phase-locked-loop with lock detector APPLICATION INFORMATION (1) To obtain optimum VCO performance, C1 must be as small as possible but larger than 100 pF. (2) Interpolation for various values of R2 can be easily calculated because a constant ...
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Philips Semiconductors Phase-locked-loop with lock detector Fig.29 Typical frequency lock range ( VCO gain ------------------------------------ - 2 (r/s/V range VCOIN December 1990 ) versus the product R1C1 VCOIN 32 ...
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Philips Semiconductors Phase-locked-loop with lock detector APPLICATION INFORMATION Lock-detection circuit The built-in lock-detection circuit will only work when used in conjunction with the phase comparator PC2. The lock-indication is derived from the phase error between SIG and COMP . The ...
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Philips Semiconductors Phase-locked-loop with lock detector C = capacitor connected to pin 15 LD (includes the parasitic input capacitance of the IC, approximately 3.5 pF phase difference between SIG LD December 1990 and COMP (positive-going edges ...
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Philips Semiconductors Phase-locked-loop with lock detector The maximum permitted phase error must be defined, before t can be LD defined using the following formula: 1 max t ----------- - ----- -. = LD 360 f IN Using this calculated value ...
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Philips Semiconductors Phase-locked-loop with lock detector PLL design example The frequency synthesizer, used in the design example shown in Fig.34, has the following parameters: Output frequency: 2 MHz to 3 MHz frequency steps : 100 kHz settling time : 1 ...
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Philips Semiconductors Phase-locked-loop with lock detector Note For an extensive description and application example please refer to application note ordering number 9398 649 90011. Also available a computer design program for PLL’s ordering number 9398 961 10061. 1.6 1.4 (t) ...
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Philips Semiconductors Phase-locked-loop with lock detector Fig.36 Frequency compared to the time response. PACKAGE OUTLINES “74HC/HCT/HCU/HCMOS Logic Package Outlines” See December 1990 74HC/HCT7046A . 38 Product specification ...