IDT5V49EE704NDGI8 IDT, Integrated Device Technology Inc, IDT5V49EE704NDGI8 Datasheet

IC PLL CLK GEN 200MHZ 28VFQFPN

IDT5V49EE704NDGI8

Manufacturer Part Number
IDT5V49EE704NDGI8
Description
IC PLL CLK GEN 200MHZ 28VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Generator, Multiplexerr
Datasheet

Specifications of IDT5V49EE704NDGI8

Pll
Yes with Bypass
Input
LVCMOS, LVTTL, Crystal
Output
LVCMOS, LVTTL
Number Of Circuits
1
Ratio - Input:output
2:7
Differential - Input:output
No/No
Frequency - Max
200MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IDT5V49EE704DLGI8
IDT5V49EE704DLGI8

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Part Number
Manufacturer
Quantity
Price
Part Number:
IDT5V49EE704NDGI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
EEPROM PROGRAMMABLE CLOCK GENERATOR
Description
The IDT5V49EE704 is a programmable clock generator
intended for high performance data-communications,
telecommunications, consumer, and networking
applications. There are four internal PLLs, each individually
programmable, allowing for four unique non-integer-related
frequencies. The frequencies are generated from a single
reference clock. The reference clock can come from one of
the two redundant clock inputs. A glitchless automatic or
manual switchover function allows any one of the redundant
clocks to be selected during normal operation.
The IDT5V49EE704 is in-system, programmable and can
be programmed through the use of I
internal EEPROM allows the user to save and restore the
configuration of the device without having to reprogram it on
power-up.
Each of the four PLLs has an 7-bit reference divider and a
12-bit feedback divider. This allows the user to generate
four unique non-integer-related frequencies. The PLL loop
bandwidth is programmable to allow the user to tailor the
PLL response to the application. For instance, the user can
tune the PLL parameters to minimize jitter generation or to
maximize jitter attenuation. Spread spectrum generation
and/or fractional divides are allowed on two of the PLLs.
There are a total of five 8-bit output dividers. The outputs
are connected to the PLLs via a switch matrix. The switch
matrix allows the user to route the PLL outputs to any
output bank. This feature can be used to simplify and
optimize the board layout. In addition, each output's slew
rate and enable/disable function is programmable.
IDT® EEPROM PROGRAMMABLE CLOCK GENERATOR
2
C interface. An
1
Features
Four internal PLLs
Internal non-volatile EEPROM
Fast (400kHz) mode I
Input frequency range: 1 MHz to 200 MHz
Output frequency range: 4.9 kHz to 200 MHz
Reference crystal input with programmable linear load
capacitance
Three independently controlled VDDO (1.8V - 3.3V)
Each PLL has a 7-bit reference divider and a 12-bit
feedback-divider
8-bit output-divider blocks
Fractional division capability on one PLL
Two of the PLLs support spread spectrum generation
capability
I/O Standards:
Programmable slew rate control
Programmable loop bandwidth
Programmable output inversion to reduce bimodal jitter
Redundant clock inputs with glitchless auto and manual
switchover options
Individual output enable/disable
Power-down mode
3.3V core V
Available in VFQFPN package
-40 to +85 C Industrial Temp operation
– Crystal frequency range: 8 MHz to 50 MHz
– Outputs - 1.8 - 3.3 V LVTTL/ LVCMOS
– Inputs - 3.3 V LVTTL/ LVCMOS
DD
2
C serial interface
IDT5V49EE704
IDT5V49EE704
DATASHEET
REV F 022310

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IDT5V49EE704NDGI8 Summary of contents

Page 1

EEPROM PROGRAMMABLE CLOCK GENERATOR Description The IDT5V49EE704 is a programmable clock generator intended for high performance data-communications, telecommunications, consumer, and networking applications. There are four internal PLLs, each individually programmable, allowing for four unique non-integer-related frequencies. The frequencies are generated ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Functional Block Diagram XIN/REF XOUT CLKIN CLKSEL SD/OE SDA Control Logic SCL SEL[2:0] 1. CLKIN, CLKSEL, SD/OE and SEL[2:0] have pull down resistors. IDT® EEPROM PROGRAMMABLE CLOCK GENERATOR PLL0 (SS) ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Pin Configuration VDD 1 XOUT 2 XIN/REF 3 VDDx 4 CLKIN 5 GND 6 OUT1 pin VFQFPN (Top View) Pin Descriptions Pin# Pin ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Pin# Pin Name 13 VDDO5 14 GND 15 SDAT 16 SCLK 17 CLKSEL 18 AVDD 19 GND 20 OUT6 21 OUT3 22 VDDO3 23 SEL2 24 SEL1 25 SEL0 26 SD/OE 27 OUT0 28 GND ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR PLL Features and Descriptions Pre-Divider 1 (D) Values PLL0 1 - 127 PLL1 1 - 127 PLL2 1 - 127 PLL3 3 - 127 1.For PLL0, PLL1 and PLL2, D=0 means PLL power down. For ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Reference Clock Input Pins and Selection The IDT5V49EE704 supports up to two clock inputs. One of the clock inputs (XIN/ REF) can be driven by either an external crystal or a reference clock. The second ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR clocks are at different frequencies, the device will always remain on the primary clock unless it is absent for two secondary clock cycles. The secondary clock must always run at a frequency less than or ...

Page 8

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR SS_OFFSET[5:0] These bits are used to program the fractional offset with respect to the nominal M integer value. For center spread, the SS_OFFSET is set to '0' so that the spread spectrum waveform is centered ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Profile: Waveform starts with SS_OFFSET, SS_OFFSET + SD SS_OFFSET + SD , etc. J+1 Spread Spectrum Using Sinusoidal Profile Example F = 25MHz 100MHz, Fssc = 33KHz with center IN OUT spread of ...

Page 10

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Spread Spectrum Generation (PLL3) PLL3 support spread spectrum generation capability, which users have the option of turning on and off. Spread spectrum profile, frequency, and spread are fully programmable (within limits). The technique is different ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR PLL Loop Bandwidth: Charge pump gain (Kφ⎞ 2π VCO gain ( 900 MHz/V * 2π VCO M = Total multiplier value (See the Reference Divider, Feedback Divider and Output Divider ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR SEL[2:0] Function The IDT5V49EE704 can support up to six unique configurations. Users may pre-programmed all these configurations, and select the configurations using SEL[2:0] SEL2 SEL1 SEL0 ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Each frame starts with a “Start Condition” and ends with an “End Condition”. These are both generated by the Master device. MSB 7-bit slave address R/W 0 – Slave will ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Progread Note: If the expected read command is not from the next higher register to the previous read or write command, then set a known “read” register address prior to a read operation by issuing ...

Page 15

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Bus DC Characteristics Symbol Parameter V Input HIGH Level IH V Input LOW Level IL V Hysteresis of Inputs HYS I Input Leakage Current IN V Output LOW Voltage ...

Page 16

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Bus AC Characteristics for Fast Mode Symbol Parameter F Serial Clock Frequency (SCL) SCLK t Bus free time between STOP and START BUF t Setup Time, START SU:START t Hold Time, START ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the IDT5V49EE704. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the ...

Page 18

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Capacitance (T = +25 °C) A Symbol C Input Capacitance (CLKIN, CLKSEL, SD/OE, IN SDA, SCL, SEL[2:0]) Pull-down CLKIN, CLKSEL, SD/OE, SEL[2:0] Resistor Crystal Specifications XTAL_FREQ Crystal frequency XTAL_MIN Minimum crystal load capacitance XTAL_MAX Maximum ...

Page 19

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR AC Timing Electrical Characteristics (Spread Spectrum Generation = OFF) Symbol Parameter 1 f Input Frequency Output Frequency f VCO Frequency VCO f PFD Frequency PFD f Loop Bandwidth BW t2 Input ...

Page 20

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Spread Spectrum Generation Specifications Symbol Parameter 1 f Input Frequency Input Frequency Limit IN f Mod Frequency Modulation Frequency MOD f Spread Value Amount of Spread Value (programmable) - Down Spread SPREAD Amount of Spread ...

Page 21

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Programming Registers Table Default Register Addr Hex 7 6 Value 0x00 00 0x01 00 SP OE6 0x02 02 0x03 02 Reserved 0x04 0F SH 0x05 04 Reserved 0x06 00 0x07 00 Reserved 0x08 00 0x09 ...

Page 22

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Default Register Addr Hex 7 6 Value 0x28 00 Reserved 0x29 00 Reserved 0x2A 00 Reserved 0x2B 00 Reserved 0x2C 00 Reserved 0x2D 00 Reserved 0x2E 01 0x2F 01 0x30 01 0x31 01 0x32 01 ...

Page 23

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Default Register Addr Hex 7 6 Value 0x56 00 IP3[3:0]_CFG4 0x57 00 IP3[3:0]_CFG5 0x58 00 IP3[3:0]_CFG0 0x59 00 IP3[3:0]_CFG1 0x5A 00 IP3[3:0]_CFG2 0x5B 00 IP3[3:0]_CFG3 0x5C 03 Reserved 0x5D 03 Reserved 0x5E 03 Reserved 0x5F ...

Page 24

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Default Register Addr Hex 7 6 Value 0x7D 00 0x7E 00 0x7F 00 0x80 00 0x81 00 0x82 00 0x83 00 0x84 00 0x85 00 0x86 00 0x87 00 0x88 FF PM1_CFG0 0x89 FF PM1_CFG1 ...

Page 25

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Default Register Addr Hex 7 6 Value 0xAC 00 TSSC[3:0]_CFG0 0xAD 00 TSSC[3:0]_CFG1 0xAE 00 TSSC[3:0]_CFG2 0xAF 00 TSSC[3:0]_CFG3 0xB0 00 TSSC[3:0]_CFG4 0xB1 00 TSSC[3:0]_CFG5 0xB2 00 DITH_CFG4 X2_CFG4 0xB3 00 DITH_CFG5 X2_CFG5 0xB4 00 ...

Page 26

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Marking Diagram 4704DI #YYWW$ Notes: 1. “#” is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. “$” is the assembly mark code. ...

Page 27

IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Package Outline and Package Dimensions Package dimensions are kept current with JEDEC Publication No. 95 Index Area Top View D Millimeters Symbol Min Max A 0.80 1. 0.05 A3 ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Revision History Rev. Originator Date Description of Change A R.Willner 4/22/09 Advance Information. B R.Willner 5/04/09 Identified VDDX (crystal oscillator power) and AVDD (analog power) on device. C R.Willner 6/04/09 Add default configurations, pull-down resistor ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR IDT® EEPROM PROGRAMMABLE CLOCK GENERATOR 29 CLOCK SYNTHESIZER IDT5V49EE704 REV F 022310 ...

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IDT5V49EE704 EEPROM PROGRAMMABLE CLOCK GENERATOR Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject ...

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