ICS844202AKI-245LFT IDT, Integrated Device Technology Inc, ICS844202AKI-245LFT Datasheet - Page 7

• Manufacturer Part Number: ICS844202AKI-245LFT
• Description: IC CLOCK GEN SRL SCSI 32-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Clock/Frequency Synthesizerr

Specifications of ICS844202AKI-245LFT

• Input: LVCMOS, LVTTL
• Output: LVDS
• Frequency - Max: 250MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN
• Frequency-max: 250MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 844202AKI-245LFT

LVCMOS
The XTAL_IN input can accept a single-ended LVCMOS
signal through an AC couple capacitor. A general interface
diagram is shown in Figure 3. The XTAL_OUT pin can be left
floating. The input edge rate can be as slow as 10ns. For
LVCMOS inputs, it is recommended that the amplitude be
reduced from full swing to half swing in order to prevent signal
interference with the power rail and to reduce noise. This
configuration requires that the output impedance of the driver
T
The expose metal pad provides heat transfer from the device to
the P.C. board. The expose metal pad is ground pad connected
to ground plane through thermal via. The exposed pad on the
device to the exposed metal pad on the PCB is contacted through
IDT
HERMAL
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM
™
/ ICS
™
LVDS PCI EXPRESS™ CLOCK SYNTHESIZER
R
TO
ELEASE
XTAL I
PIN PAD
P
ATH
PIN
NTERFACE
F
IGURE
F
IGURE
3. G
SOLDER
VCC
V
GROUND PLANE
4. P.C. B
DD
Ro
ENERAL
OARD FOR
Zo = Ro + Rs
D
IAGRAM FOR
Rs
E
XPOSED
THERMAL VIA
EPAD
Zo = 50
LVCMOS D
P
7
AD
(Ro) plus the series resistance (Rs) equals the transmission
line impedance. In addition, matched termination at the crystal
input will attenuate the signal in half. This can be done in one
of two ways. First, R1 and R2 in parallel should equal the
transmission line impedance. For most 50
and R2 can be 100 . This can also be accomplished by
removing R1 and making R2 50 .
solder as shown in Figure 4. For further information, please refer
to the Application Note on Surface Mount Assembly of Amkor’s
Thermally /Electrically Enhance Leadframe Base Package, Amkor
Technology.
VCC
V
T
DD
HERMAL
R1
R2
RIVER TO
.1uf
R
ELEASE
XTAL I
EXPOSED METAL PAD
XTAL_IN
XTAL_OUT
(GROUND PAD)
SOLDER
P
NPUT
ATH
E
I
ICS844202BK-245 REV. A JULY 9, 2007
NTERFACE
XAMPLE
PIN
PIN PAD
PRELIMINARY
applications, R1