ICS477R-05LF IDT, Integrated Device Technology Inc, ICS477R-05LF Datasheet - Page 4

• Manufacturer Part Number: ICS477R-05LF
• Description: IC QUAD PLL VCXO FOR HDTV 28QSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Phase Lock Loop (PLL)r

Specifications of ICS477R-05LF

• Pll: Yes with Bypass
• Input: Crystal
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 2:5
• Differential - Input:output: No/No
• Frequency - Max: 74.175MHz
• Divider/multiplier: No/No
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• Frequency-max: 74MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 477R-05LF

IDT™ / ICS™ QUAD PLL WITH VCXO FOR HDTV
ICS477-05
QUAD PLL WITH VCXO FOR HDTV
considered to reduce stray capacitance. (Alternately,
the crystal may be re-specified to a higher load
capacitance. Contact ICS for details.) If the centering
error is more than 25 ppm positive, add identical fixed
centering capacitors from each crystal pin to ground.
The value for each of these caps (in pF) is given by:
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01µF decoupling capacitors should be
mounted on the component side of the board as close
to the VDD pins as possible. No vias should be used
between the decoupling capacitors and VDD pins. The
PCB trace to VDD pin should be kept as short as
possible, as should the PCB trace to the ground via.
2) The external crystal should be mounted just next to
the device with short traces. The X1 and X2 traces
should not be routed next to each other with minimum
Absolute Maximum Ratings
External Capacitor =
Stresses above the ratings listed below can cause permanent damage to the ICS477-05. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Storage Temperature
Junction Temperature
Soldering Temperature
Item
4
Trim sensitivity is a parameter which can be supplied by
your crystal vendor. If you do not know the value,
assume it is 30 ppm/pF. After any changes, repeat the
measurement to verify that the remaining error is
acceptably low (typically less than ±25 ppm).
spaces, instead they should be separated and away
from other traces.
3) To minimize EMI, the 33 series termination resistor
(if needed) should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed away
from the ICS477-05. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
2 x (centering error)/(trim sensitivity)
7 V
-0.5 V to VDD+0.5 V
0 to +70 C
-40 to +85 C
-65 to +150 C
125 C
260 C
Rating
VCXO AND SYNTHESIZER
ICS477-05
REV H 062404