ICS8624BYLF IDT, Integrated Device Technology Inc, ICS8624BYLF Datasheet - Page 18

• Manufacturer Part Number: ICS8624BYLF
• Description: IC BUFFER ZD 1-5 HSTL 32-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Distribution, Multiplexer , Zero Delay Bufferr

Specifications of ICS8624BYLF

• Pll: Yes with Bypass
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: HSTL
• Number Of Circuits: 1
• Ratio - Input:output: 2:5
• Differential - Input:output: Yes/Yes
• Frequency - Max: 700MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 700MHz
• Number Of Elements: 1
• Supply Current: 120mA
• Pll Input Freq (min): 31.25MHz
• Pll Input Freq (max): 700MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: LQFP
• Output Frequency Range: Up to 700MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8624BYLF

ICS8624 Data Sheet
Revision History Sheet
ICS8624BY REVISION E OCTOBER 6, 2009
Rev
A
A
A
B
C
C
D
E
Table
T4A
T4C
T4D
T6B
T6A
T4A
T4C
T6A
T6C
T10
T10
T10
T1
T2
11 - 12
Page
7 - 8
10
14
14
10
13
17
8
1
2
4
4
9
3
4
5
5
8
5
4
5
6
6
9
Description of Change
Switched labels on Figure 8, odc & t
Revised label on Figure 11 to read ICS8624 LVHSTL... from ICS8634 LVDS...
Revised Block Diagram.
Updated Phase Jitter Diagram and Output Rise & Fall Time Diagram.
Revised Figures 3A & 3B.
Pin Description table - revised MR & V
Power Supply table - revised V
Description table.
Differential DC Charc. table - changed V
Revised Single Ended Signal diagram.
Updated format.
Pin Characteristics Table - changed C
Absolute Maximum Ratings - updated Output rating.
HSTL DC Characteristics Table - changed V
Added Table 6B AC Characteristics Table with V
Changed LVHSTL to HSTL throughout the data sheet.
Added Differential Clock Input Interface section.
Added ""Lead Free"" part number to Ordering Information table.
AC Characteristics Table -adjusted T
the typical spec.
Ordering Information Table - added Lead-Free note.
Power Supply DC Characteristics Table - changed V
Table Header to match change.
Differential DC Characteristics Table - updated NOTES 1 & 2.
Added Thermal note.
Added 1.5V to 1.6V AC Characteristics Table.
Added Recommendations for Unused Input & Output Pins section.
Updated Differential Clock Input Interface section.
Power Considerations - updated Power Dissipation calculation.
Ordering Information Table - deleted “ICS” prefix from Part/Order Number column.
Converted datasheet format.
DD
parameter description to correspond with the Pin
18
PERIOD
PD
IN
DD
spec from 3.4ns Min. to 3.2ns Min. and deleted
PP
4pF max. to 4pF typical.
descriptions.
limit from 0.15V minimum to 0.1V minimum.
diagram.
OX
LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER
to 40% min. - 60% max. and added note.
DD
= V
DDO
DDA
min. from 1.6V to 1.5V. Updated
= 3.3V±10%.
©2009 Integrated Device Technology, Inc.
10/30/01
10/31/01
8/13/02
2/12/03
2/19/04
6/15/04
6/27/05
10/6/09
Date