ICS814252CKI-02LF IDT, Integrated Device Technology Inc, ICS814252CKI-02LF Datasheet - Page 14

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ICS814252CKI-02LF

Manufacturer Part Number
ICS814252CKI-02LF
Description
IC VCXO/FEMTOCLK 2LVDS 32-VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™, FemtoClock®r
Type
Frequency Translator, Jitter Attenuator, Voltage Controlled Crystal Oscillator (VCXO)r
Datasheet

Specifications of ICS814252CKI-02LF

Pll
Yes
Input
HCSL, LVDS, LVHSTL, LVPECL, SSTL
Output
LVDS
Number Of Circuits
1
Ratio - Input:output
3:2
Differential - Input:output
Yes/Yes
Frequency - Max
312.5MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN
Frequency-max
312.5MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
814252CKI-02LF
T
IDT
This section provides information on power dissipation and junction temperature for the ICS814252I-02.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS814252I-02 is the sum of the core power plus the analog power plus the power dissipated in
the load(s). The following is the power dissipation for V
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow and a multi-layer board, the appropriate value is 37°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and
the type of board (single layer or multi-layer).
ABLE
ICS814252I-02
VCXO JITTER ATTENUATOR & FEMTOCLOCK™ MULTIPLIER
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.731W * 37°C/W = 112°C. This is below the limit of 125°C.
/ ICS
JA
A
6. T
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
Power (core)
VCXO JITTER ATTENUATOR/MULTIPLIER
HERMAL
Multi-Layer PCB, JEDEC Standard Test Boards
R
ESISTANCE
MAX
= V
DD_MAX
θ θ θ θ θ
* ((I
JA
FOR
DD_MAX
32-L
+ I
θ θ θ θ θ
JA
JA
DDX_MAX
P
EAD
* Pd_total + T
vs. 0 Air Flow (Meters per Second)
OWER
) + I
VFQFN, F
DDA_MAX
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
+ I
C
A
ORCED
DDO_MAX
ONSIDERATIONS
14
) = 3.465V * (166mA + 10mA + 35mA) = 731mW
C
ONVECTION
37.0°C/W
TM
devices is 125°C.
0
ICS814252CKI-02 REV. A OCTOBER 5, 2007
32.4°C/W
1
JA
must be used. Assuming no air
29.0°C/W
PRELIMINARY
2.5

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