IDT82V3280DQG IDT, Integrated Device Technology Inc, IDT82V3280DQG Datasheet - Page 162

• Manufacturer Part Number: IDT82V3280DQG
• Description: IC PLL WAN SE STRATUM 2 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3280DQG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: 622.08MHz
• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: TQFP EP
• Pin Count: 100
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3280DQG

Table 62: Input/Output Clock Timing
9.6
Electrical Specifications
Note:
1. Typical delay provided as reference only.
2. ‘Peak to Peak Delay Variation’ is the delay variation that is guaranteed not to be exceeded for IN11 in Master/Slave operation.
3. Tested when IN11 is selected.
IDT82V3280
The inputs and outputs are aligned ideally. But due to the circuit delays, there is delay between the inputs and outputs.
INPUT / OUTPUT CLOCK TIMING
Symbol
t
t
t
t
t
t
1
2
3
4
5
6
19.44 MHz Output Clock
19.44 MHz Input Clock
8 kHz Input Clock
8 kHz Output Clock
51.84 MHz Input Clock
51.84 MHz Output Clock
6.48 MHz Input Clock
6.48 MHz Output Clock
38.88 MHz Output Clock
25.92 MHz Input Clock
38.88 MHz Input Clock
25.92 MHz Output Clock
3
Figure 38. Input / Output Clock Timing
Typical Delay
1.4
t
t
t
t
t
t
1
4
1
1
2
3
2
3
4
5
6
1
(ns)
162
Peak to Peak Delay Variation
1.6
1.6
1.6
1.6
1.6
1.6
December 9, 2008
2
(ns)
WAN PLL