LMX2471SLEX National Semiconductor, LMX2471SLEX Datasheet - Page 27

• Manufacturer Part Number: LMX2471SLEX
• Description: IC PLL LP 3.6GHZ/1.7GHZ 24-CSP
• Manufacturer: National Semiconductor
• Type: PLL Frequency Synthesizer, Delta Sigmar

Specifications of LMX2471SLEX

• Pll: Yes with Bypass
• Input: CMOS
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 3:3
• Differential - Input:output: Yes/No
• Frequency - Max: 3.6GHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-Laminate UTCSP
• Frequency-max: 3.6GHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LMX2471SLEXTR

REGISTER
Programming Description
2.2 R1 REGISTER
2.2.1 RF_FD[11:0] -- RF PLL Fractional Denominator
The function of these bits are described in section 2.8.2.
2.2.2 RF_R [5:0] -- RF R Divider Value
The RF R Counter value is determined by this control word. Note that this counter does allow values down to one.
2.2.3 RF_PD -- RF Power Down Control Bit
When this bit is set to 0, the RF PLL operates normally. When it is set to one, the RF PLL is powered down and the RF Charge
pump is set to a TRI-STATE mode. Because the EN pin and ATPU[1:0] word also controls power down functions, there may be
some conflicts. The order of precedence is as follows. First, if the EN pin is LOW, then the PLL will be powered down. Provided
this is not the case, the PLL will be powered up if the ATPU[1:0] word says to do so, regardless of the state of the RF_PD bit. After
the EN pin and the ATPU[1:0] word are considered, then the RF_PD bit then takes control of the power down function for the RF
PLL.
R1
R Value
63
...
1
RF_PD
23
22
1
21
DATA[19:0] ( Except for the RF_N Register, which is [22:0] )
20
0
1
.
RF_R[5:0]
19
18
(Continued)
17
0
1
.
16
15
14
27
0
1
.
13
RF_R[5:0]
12
RF_FD[11:0]
11
10
0
1
.
9
8
7
6
0
1
.
5
4
C3
3
0
C2
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2
0
1
1
.
C1
1
0
C0
0
1