SI5321-G-BC Silicon Laboratories Inc, SI5321-G-BC Datasheet - Page 6
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SI5321-G-BC
Manufacturer Part Number
SI5321-G-BC
Description
IC PREC CLOCK MULTIPLIER 63CBGA
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheet
1.SI5321-H-GL.pdf
(34 pages)
Specifications of SI5321-G-BC
Package / Case
63-CBGA
Pll
Yes
Input
LVTTL
Output
CML
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
Yes/Yes
Frequency - Max
2.8GHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
2.4GHz
Mounting Style
SMD/SMT
Description/function
The is a precision clock multiplier designed to exceed the requirements of high speed communication systems
Operating Supply Voltage
3.3 V
Operating Temperature Range
- 55 C to + 150 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1274
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI5321-G-BC
Manufacturer:
SILICON
Quantity:
5
Company:
Part Number:
SI5321-G-BC
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
SI5321-G-BC
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Table 2. DC Characteristics, V
(V
Si5321
6
Parameter
Supply Current 1
Supply Current 2
Power Dissipation Using 3.3 V Supply
Clock Output
Common Mode Input Voltage
(CLKIN)
Single-Ended Input Voltage
(CLKIN)
Differential Input Voltage Swing
(CLKIN)
Input Impedance
(CLKIN+, CLKIN–)
Differential Output Voltage Swing
(CLKOUT)
Output Common Mode Voltage
(CLKOUT)
Output Short to GND (CLKOUT)
Output Short to V
Input Voltage Low (LVTTL Inputs)
Input Voltage High (LVTTL Inputs)
Input Low Current (LVTTL Inputs)
Input High Current (LVTTL Inputs)
Internal Pulldowns (LVTTL Inputs)
Input Impedance (LVTTL Inputs)
Output Voltage Low (LVTTL Outputs)
Output Voltage High (LVTTL Outputs)
Notes:
DD33
1. The Si5321 device provides weak 1.5 V internal biasing that enables ac-coupled operation.
2. Clock inputs may be driven differentially or single-endedly. When driven single-endedly, the unused input should be ac-
3. Transmission line termination, when required, must be provided externally.
4. Although the Si5321 device can operate with input clock swings as high as 1500 mV
= 3.3 V ±5%, T
coupled to ground.
maintaining the input clock amplitude below 500 mV
DD25
A
= –20 to 85 °C)
(CLKOUT)
2,3,4
1,2,3
2,3,4
DD
= 3.3 V
Symbol
V
I
I
V
V
SC(–)
SC(+)
V
V
R
R
I
I
V
V
V
P
V
OCM
I
I
DD
DD
I
ICM
pd
OD
IH
OH
IL
OL
ID
IH
IS
IN
IL
IN
D
PP
Rev. 2.5
FRQSEL[0:2] = 011
for optimal performance.
622.08 MHz Out
622.08 MHz Out
Test Condition
622.08 MHz In,
19.44 MHz Out
See Figure 1A
See Figure 1B
19.44 MHz In,
19.44 MHz In,
Line-to-Line,
100 Ω Load
100 Ω Load
Line-to-Line
I
I
O
O
= 0.5 mA
= 0.5 mA
PP
Min
200
200
750
–60
1.0
1.4
2.0
2.0
50
—
—
—
—
—
—
—
—
—
—
, Silicon Laboratories recommends
Typ
141
135
445
825
1.5
1.8
80
15
—
—
—
—
—
—
—
—
—
—
—
1100
500
500
Max
155
145
479
2.0
2.2
0.8
0.4
50
50
50
—
—
—
—
—
—
4
4
mV
mV
mV
Unit
mW
mA
mA
mA
mA
k Ω
μ A
μ A
μ A
k Ω
V
V
V
V
V
V
PP
PP
PP