SI5321-G-BC Silicon Laboratories Inc, SI5321-G-BC Datasheet - Page 8
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SI5321-G-BC
Manufacturer Part Number
SI5321-G-BC
Description
IC PREC CLOCK MULTIPLIER 63CBGA
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheet
1.SI5321-H-GL.pdf
(34 pages)
Specifications of SI5321-G-BC
Package / Case
63-CBGA
Pll
Yes
Input
LVTTL
Output
CML
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
Yes/Yes
Frequency - Max
2.8GHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
2.4GHz
Mounting Style
SMD/SMT
Description/function
The is a precision clock multiplier designed to exceed the requirements of high speed communication systems
Operating Supply Voltage
3.3 V
Operating Temperature Range
- 55 C to + 150 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1274
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI5321-G-BC
Manufacturer:
SILICON
Quantity:
5
Company:
Part Number:
SI5321-G-BC
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
SI5321-G-BC
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Table 3. AC Characteristics (Continued)
(V
Si5321
8
Parameter
Input Clock Frequency (CLKIN)
FEC[2:0] = 110 (forward FEC)
INFRQSEL[2:0] = 001
INFRQSEL[2:0] = 010
INFRQSEL[2:0] = 011
INFRQSEL[2:0] = 100
INFRQSEL[2:0] = 101
INFRQSEL[2:0] = 110
Input Clock Frequency (CLKIN)
FEC[2:0] = 111 (reverse FEC)
INFRQSEL[2:0] = 001
INFRQSEL[2:0] = 010
INFRQSEL[2:0] = 011
INFRQSEL[2:0] = 100
INFRQSEL[2:0] = 101
INFRQSEL[2:0] = 110
Input Clock Rise Time (CLKIN)
Input Clock Fall Time (CLKIN)
Input Clock Duty Cycle
CLKOUT Frequency Range
FRQSEL[2:0] = 001
FRQSEL[2:0] = 000
FRQSEL[2:0] = 100
FRQSEL[2:0] = 010
FRQSEL[2:0] = 101
FRQSEL[2:0] = 011
FRQSEL[2:0] = 110
FRQSEL[2:0] = 111
CLKOUT Rise Time
CLKOUT Fall Time
Output Clock Duty Cycle
RSTN/CAL Pulse Width
Note: The Si5321 provides a 1/32x, 1/16x, 1/8x, 1/4x, 1/2x, 1x, 2x, 4x, 8x, 16x, 32x, 64x, or 128x clock multiplication function
DD33
= 3.3 V ±5%, T
with an option for additional frequency scaling by a factor of 255/238, 238/255, 255/237, 237/255, 66/64, or 64/66 for
FEC rate conversion.
A
= –20 to 85 °C)
C
C
Symbol
DUTY_OUT
f
f
DUTY_IN
f
f
f
f
f
O_1250
O_2500
t
f
f
f
CLKIN
CLKIN
O_155
O_311
O_622
RSTN
O_19
O_39
O_78
t
t
t
t
R
R
F
F
Minimum input frequency is
Minimum input frequency is
(CLKOUT+) – (CLKOUT–),
3 cm of 50 Ω FR4 stripline,
3 cm of 50 Ω FR4 stripline,
Figure 2; differential; after
Figure 2; differential; after
in the 155 MHz range,
in the 155 MHz range,
FRQSEL[0:2] = 011
FRQSEL[0:2] = 011
FRQSEL[0:2] = 011
66/64 FEC Scaling
64/66 FEC Scaling
Rev. 2.5
Test Condition
FXDDELAY = 1
FXDDELAY = 1
Differential:
Figure 2
Figure 2
150.79
301.58
603.16
160.36
320.72
641.46
19.436
38.872
77.744
155.48
310.97
621.95
1243.9
2487.8
Min
N/A
N/A
N/A
N/A
N/A
N/A
40
48
20
—
—
—
—
Typ
N/A
N/A
N/A
N/A
N/A
N/A
190
190
50
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
168.22
336.44
672.88
178.90
357.80
715.59
21.685
43.369
86.738
173.48
346.95
693.90
1387.8
2775.6
Max
N/A
N/A
N/A
N/A
N/A
N/A
220
220
11
11
60
52
—
MHz
MHz
MHz
Unit
ns
ns
ps
ps
ns
%
%