M41T81M6F STMicroelectronics, M41T81M6F Datasheet - Page 16
![IC RTC SERIAL W/ALARM 8-SOIC](/photos/1/38/13851/497-8-soic_sml.jpg)
M41T81M6F
Manufacturer Part Number
M41T81M6F
Description
IC RTC SERIAL W/ALARM 8-SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Alarmr
Datasheet
1.M41T81M6F.pdf
(29 pages)
Specifications of M41T81M6F
Memory Size
20B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4709-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
M41T81M6F
Manufacturer:
STM
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1 364
Part Number:
M41T81M6F
Manufacturer:
ST
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20 000
Part Number:
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Clock operation
3.4
Note:
16/29
Setting alarm clock registers
Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go
off at a prescribed time on a specific month, date, hour, minute, or second or repeat every
year, month, day, hour, minute, or second. It can also be programmed to go off while the
M41T81 is in the battery backup mode to serve as a system wake-up call.
Bits RPT5-RPT1 put the alarm in the repeat mode of operation.
the possible configurations. Codes not listed in the table default to the once per second
mode to quickly alert the user of an incorrect alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5-RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set (and
SQWE is '0.'), the alarm condition activates the IRQ/FT/OUT/SQW pin.
If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “alarm seconds,” the
address pointer will increment to the flag address, causing this situation to occur.
The IRQ/FT/OUT/SQW output is cleared by a READ to the flags register as shown in
Figure
alarm flag has been reset to '0.'
The IRQ/FT/OUT/SQW pin can also be activated in the battery backup mode. The
IRQ/FT/OUT/SQW will go low if an alarm occurs and both ABE (alarm in battery backup
mode enable) and AFE are set.
Figure 12. Alarm interrupt reset waveform
IRQ/FT/OUT/SQW
ACTIVE FLAG
12. A subsequent READ of the flags register is necessary to see that the value of the
0Eh
Doc ID 7529 Rev 10
Figure 13
illustrates the backup mode alarm timing.
0Fh
Table 3 on page 17
HIGH-Z
10h
M41T81
shows
AI04617