M41T81M6F STMicroelectronics, M41T81M6F Datasheet - Page 19
![IC RTC SERIAL W/ALARM 8-SOIC](/photos/1/38/13851/497-8-soic_sml.jpg)
M41T81M6F
Manufacturer Part Number
M41T81M6F
Description
IC RTC SERIAL W/ALARM 8-SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Alarmr
Datasheet
1.M41T81M6F.pdf
(29 pages)
Specifications of M41T81M6F
Memory Size
20B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4709-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M41T81M6F
Manufacturer:
STM
Quantity:
1 364
Part Number:
M41T81M6F
Manufacturer:
ST
Quantity:
20 000
Part Number:
M41T81M6F11
Manufacturer:
ST
Quantity:
20 000
M41T81
3.8
Note:
3.9
Output driver pin
When the FT bit, AFE bit, SQWE bit, and watchdog register are not set, the
IRQ/FT/OUT/SQW pin becomes an output driver that reflects the contents of D7 of the
control register. In other words, when D7 (OUT bit) and D6 (FT bit) of address location 08h
are a '0,' then the IRQ/FT/OUT/SQW pin will be driven low.
The IRQ/FT/OUT/SQW pin is an open drain which requires an external pull-up resistor.
Preferred initial power-on default
Upon initial application of power to the device, the following register bits are set to a '0' state:
watchdog register; AFE; ABE; SQWE; and FT. The following bits are set to a '1' state: ST;
OUT; and HT (see
Table 5.
1. BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. UC = unchanged
Initial power-up
Subsequent power-up (with
battery backup)
Condition
Preferred default values
(2)
(3)
Table
5).
UC
ST
1
Doc ID 7529 Rev 10
HT
1
1
OUT
UC
1
FT
0
0
AFE
UC
0
SQWE
UC
0
ABE
UC
0
Clock operation
Watchdog
register
0
0
19/29
(1)