M41T81M6F STMicroelectronics, M41T81M6F Datasheet - Page 17
![IC RTC SERIAL W/ALARM 8-SOIC](/photos/1/38/13851/497-8-soic_sml.jpg)
M41T81M6F
Manufacturer Part Number
M41T81M6F
Description
IC RTC SERIAL W/ALARM 8-SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Alarmr
Datasheet
1.M41T81M6F.pdf
(29 pages)
Specifications of M41T81M6F
Memory Size
20B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4709-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M41T81M6F
Manufacturer:
STM
Quantity:
1 364
Part Number:
M41T81M6F
Manufacturer:
ST
Quantity:
20 000
Part Number:
M41T81M6F11
Manufacturer:
ST
Quantity:
20 000
M41T81
3.5
Figure 13. Backup mode alarm waveform
Table 3.
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the watchdog
register, address 09h. Bits BMB4-BMB0 store a binary multiplier and the two lower order bits
RB1-RB0 select the resolution, where 00 = 1/16 second, 01 = 1/4 second, 10 = 1 second,
and 11 = 4 seconds. The amount of time-out is then determined to be the multiplication of
the five-bit multiplier value with the resolution. (For example: writing 00001110 in the
watchdog register = 3*1, or 3 seconds). If the processor does not reset the timer within the
specified period, the M41T81 sets the WDF (watchdog flag) and generates a watchdog
interrupt.
The watchdog timer can be reset by having the microprocessor perform a WRITE of the
watchdog register. The time-out period then starts over.
Should the watchdog timer time-out, a value of 00h needs to be written to the watchdog
register in order to clear the IRQ/FT/OUT/SQW pin. This will also disable the watchdog
function until it is again programmed correctly. A READ of the flags register will reset the
watchdog flag (bit D7; register 0Fh).
The watchdog function is automatically disabled upon power-up and the watchdog register
is cleared. If the watchdog function is set, the frequency test function is activated, and the
SQWE bit is '0,' the watchdog function prevails and the frequency test function is denied.
V
IRQ/FT/OUT/SQW
V
ABE and AFE Bits
AF Bit in Flags
Register
CC
RPT5
SO
1
1
1
1
1
0
Alarm repeat modes
RPT4
1
1
1
1
0
0
RPT3
HIGH-Z
1
1
1
0
0
0
Doc ID 7529 Rev 10
RPT2
1
1
0
0
0
0
RPT1
1
0
0
0
0
0
Once per second
Once per minute
Once per month
Alarm setting
Once per hour
Once per year
Once per day
Clock operation
trec
AI05663
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